MPC8313ZQADDC Freescale Semiconductor, MPC8313ZQADDC Datasheet - Page 666

• Manufacturer Part Number: MPC8313ZQADDC
• Description: Microprocessors - MPU 8313 REV2.2 PB NO ENC
• Manufacturer: Freescale Semiconductor

Specifications of MPC8313ZQADDC

• Processor Series: MPC8313
• Core: e300
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 133 MHz
• Program Memory Size: 16 KB
• Data Ram Size: 16 KB
• Interface Type: I2C
• Mounting Style: SMD/SMT
• Package / Case: PBGA
• Number Of Programmable I/os: 32
• Number Of Timers: 4

Security Engine (SEC) 2.2
14.4.1.6
The DEU interrupt status register (DEUISR), shown in
bit in the DEUISR can only be set if the corresponding bit of the DEU interrupt control register (DEUICR)
is zero (see
If the DEUISR is non-zero, the DEU halts and the DEU error interrupt signal is asserted to the controller
(see
channel-controlled access, an interrupt signal is generated to the channel to which this EU is assigned. The
EU error then appears in bit 55 of the channel pointer status register (see
channel error interrupt to the controller.
Table 14-15
14-24
0–49
Bits
50
51
52
53
54
Reset
Section 14.6.4.3, “Interrupt Status Register
Field
Addr
R/W
Name
KPE
ERE
KSE
CE
—
0
IE
Section 14.4.1.7, “DEU Interrupt Control Register
describes DEUISR fields.
DEU Interrupt Status Register (DEUISR)
MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2
Reserved
Key parity error. Defined parity bits in the keys written to the key registers did not reflect odd parity correctly.
(Note that key register 2 and key register 3 are checked for parity only if the appropriate DEU mode register
bit indicates triple DES. Also, key register 3 is checked only if key size reg = 24. Key register 2 is checked
only if key size reg = 16 or 24.)
0 No error detected
1 Key parity error
Internal error. An internal processing error was detected while performing encryption.
0 No error detected
1 Internal error
Note: This bit will be asserted any time an enabled error condition occurs and can only be cleared by setting
Early read error. The DEU IV register was read while the DEU was performing encryption.
0 No error detected
1 Early read error
Context error. A DEU key register, the key size register, data size register, mode register, or IV register was
modified while DEU was performing encryption.
0 No error detected
1 Context error
Key size error. An inappropriate value (8 being appropriate for single DES, and 16 and 24 being appropriate
for triple DES) was written to the DEU key size register
0 No error detected
1 Key size error
—
the corresponding bit in the interrupt control register or by resetting the DEU.
Figure 14-12. DEU Interrupt Status Register (DEUISR)
49
Table 14-15. DEUISR Field Descriptions
KPE IE ERE CE KSE DSE ME
50
51
52
(ISR)”). In addition, if the DEU is being operated through
DEU 0x3_2030
53
54
R
0
Figure
Description
55
14-12, records occurrences of errors. Each
(DEUICR)”).
56
AE OFE IFE IFU IFO OFU OFO
57
Table
58
59
14-35) and generates a
60
Freescale Semiconductor
61
62
63