MPC8313ZQADDC Freescale Semiconductor, MPC8313ZQADDC Datasheet - Page 71

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MPC8313ZQADDC

Manufacturer Part Number
MPC8313ZQADDC
Description
Microprocessors - MPU 8313 REV2.2 PB NO ENC
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MPC8313ZQADDC

Processor Series
MPC8313
Core
e300
Data Bus Width
16 bit
Maximum Clock Frequency
133 MHz
Program Memory Size
16 KB
Data Ram Size
16 KB
Interface Type
I2C
Mounting Style
SMD/SMT
Package / Case
PBGA
Number Of Programmable I/os
32
Number Of Timers
4

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MPC8313ZQADDC
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Table
Number
18-5
18-6
18-7
18-8
18-9
18-10
18-11
18-12
18-13
18-14
18-15
18-16
18-17
18-18
18-19
18-20
18-21
18-22
18-23
18-24
19-1
19-2
19-3
19-4
19-5
19-6
19-7
19-8
19-9
20-1
20-2
21-1
21-2
21-3
21-4
21-5
21-6
21-7
21-8
Freescale Semiconductor
UTHR Field Descriptions ..................................................................................................... 18-6
UDMB Field Descriptions .................................................................................................... 18-7
UDLB Field Descriptions ..................................................................................................... 18-7
Baud Rate Examples ............................................................................................................. 18-7
UIER Field Descriptions ....................................................................................................... 18-9
UIIR Field Descriptions ...................................................................................................... 18-10
UIIR IID Bits Summary...................................................................................................... 18-10
UFCR Field Descriptions.................................................................................................... 18-11
ULCR Field Descriptions.................................................................................................... 18-12
Parity Selection Using ULCR[PEN], ULCR[SP], and ULCR[EPS] .................................. 18-13
UMCR Field Descriptions .................................................................................................. 18-13
ULSR Field Descriptions .................................................................................................... 18-14
UMSR Field Descriptions................................................................................................... 18-15
USCR Field Descriptions.................................................................................................... 18-16
UAFR Field Descriptions.................................................................................................... 18-16
UDSR Field Descriptions.................................................................................................... 18-17
UDSR[TXRDY] Set Conditions ......................................................................................... 18-17
UDSR[TXRDY] Cleared Conditions.................................................................................. 18-17
UDSR[RXRDY] Set Conditions......................................................................................... 18-18
UDSR[RXRDY] Cleared .................................................................................................... 18-18
Signal Properties ................................................................................................................... 19-7
Detailed Signal Descriptions................................................................................................. 19-7
SPI Register Summary .......................................................................................................... 19-9
SPMODE Field Descriptions ................................................................................................ 19-9
SPIE Field Descriptions ...................................................................................................... 19-12
SPIM Field Descriptions ..................................................................................................... 19-13
SPCOM Field Descriptions................................................................................................. 19-14
SPI Transmit Data Hold Field Descriptions........................................................................ 19-14
SPI Receive Data Hold Field Descriptions ......................................................................... 19-15
JTAG Test Signals Summary ................................................................................................ 20-2
JTAG Test—Detailed Signal Descriptions............................................................................ 20-2
IPIC External Signals—Detailed Signal Descriptions.......................................................... 21-2
GPIO Register Address Map................................................................................................. 21-2
GPDIR Bit Settings ............................................................................................................... 21-3
GPODR Bit Settings ............................................................................................................. 21-3
GPnDAT Bit Settings ............................................................................................................ 21-4
GPIER Bit Settings ............................................................................................................... 21-4
GPIMR Bit Settings .............................................................................................................. 21-5
GPICR Bit Settings ............................................................................................................... 21-5
MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2
Tables
Title
Tables
Number
Page
lxxi

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