MPC8313ZQADDC Freescale Semiconductor, MPC8313ZQADDC Datasheet - Page 976

• Manufacturer Part Number: MPC8313ZQADDC
• Description: Microprocessors - MPU 8313 REV2.2 PB NO ENC
• Manufacturer: Freescale Semiconductor

Specifications of MPC8313ZQADDC

• Processor Series: MPC8313
• Core: e300
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 133 MHz
• Program Memory Size: 16 KB
• Data Ram Size: 16 KB
• Interface Type: I2C
• Mounting Style: SMD/SMT
• Package / Case: PBGA
• Number Of Programmable I/os: 32
• Number Of Timers: 4

Universal Serial Bus Interface
Split transaction interrupt, bulk and control are also managed using queue heads and queue element
transfer descriptors.
The periodic frame list is a 4K-page aligned array of frame list link pointers. The length of the frame list
may be programmable. The programmability of the periodic frame list is exported to system software
through the HCCPARAMS register. If non-programmable, the length is 1024 elements. If programmable,
the length can be selected by system software as one of 256, 512, or 1024 elements. An implementation
must support all three sizes. Programming the size (that is, the number of elements) is accomplished by
system software writing the appropriate value into frame list size field in the USBCMD register.
Frame list link pointers direct the host controller to the first work item in the frame’s periodic schedule for
the current micro-frame. The link pointers are aligned on DWord boundaries within the frame list.
Figure 16-36
Frame list link pointers always reference memory objects that are 32-byte aligned. The referenced object
may be an isochronous transfer descriptor for high-speed devices, a split-transaction isochronous transfer
descriptor (for full-speed isochronous endpoints), or a queue head (used to support high-, full- and
low-speed interrupt). System software should not place non-periodic schedule items into the periodic
schedule. The least-significant bits in a frame list pointer are used to key the host controller in as to the
type of object the pointer is referencing.
The least-significant bit is the T bit (bit 0). When this bit is set, the host controller never uses the value of
the frame list pointer as a physical memory pointer. The Typ field indicates the exact type of data structure
being referenced by this pointer. The value encodings for the Typ field are given in
16-48
Periodic Frame
31
PeriodicListBase
Operational
List Element
Registers
FRINDEX
Address
shows the format for the frame list link pointer.
MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2
1024, 512, or 256
Elements
Figure 16-35. Periodic Schedule Organization
Figure 16-36. Frame List Link Pointer Format
Frame List Link Pointer
Periodic Frame List
•
•
•
Poll Rate: N –– > 1
•
•
•
A
A
A
A
A
A
Isochronous Transfer
Descriptor(s)
8
Interrupt Queue
A
4
Heads
• • •
Table
5
Freescale Semiconductor
4
00
1
3
16-39.
Last
Periodic has
End of
List Mark
2
Typ
1
T
0