MPC8313ZQADDC Freescale Semiconductor, MPC8313ZQADDC Datasheet - Page 881

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MPC8313ZQADDC

Manufacturer Part Number
MPC8313ZQADDC
Description
Microprocessors - MPU 8313 REV2.2 PB NO ENC
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MPC8313ZQADDC

Processor Series
MPC8313
Core
e300
Data Bus Width
16 bit
Maximum Clock Frequency
133 MHz
Program Memory Size
16 KB
Data Ram Size
16 KB
Interface Type
I2C
Mounting Style
SMD/SMT
Package / Case
PBGA
Number Of Programmable I/os
32
Number Of Timers
4

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
MPC8313ZQADDC
Manufacturer:
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Quantity:
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15.6.3.3
Upon receive, the Rx FCB returns the status of frame parse and TOE functions applied to the
accompanying frame.
Freescale Semiconductor
Bytes
2–3
4–5
6–7
Offset + 0
Offset + 2
Offset + 4
Offset + 6
8–15
0–15
0–15
Bits
0–7
Receive Path Off-Load
MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2
VLN
0
VLCTL/
PTP_ID
Name
PHCS
L4OS
L3OS
Table 15-152. Tx Frame Control Block Description (continued)
Figure 15-137
IP
1
IP6
2
Layer 4 header offset from start of layer 3 header. The layer 4 header starts L4OS octets
after the layer 3 header if it is present. The maximum layer 3 header length supported is thus
255 bytes, which may prevent TCP/IP offload on particularly large IPv6 headers.
Layer 3 header offset from start of frame not including the 8 bytes for this FCB. The layer 3
header starts L3OS octets from the start of the frame including any custom preamble header
that may be present. The maximum layer 2 header length supported is thus 255 bytes.
Pseudo-header checksum (16-bit one’s complement sum with carry wraparound, but without
result inversion) for TCP or UDP packets, calculated by software. Valid only if NPH = 1.
VLAN control word for insertion in the transmitted VLAN tag. Valid only if VLN = 1.Tx PTP
packet identification number. This number will be copied into the Tx PTP packet timestamp
identification field. PTP field takes precedence over VLN field.
Figure 15-137. Receive Frame Control Block
TUP CIP CTU EIP
3
describes the definition for the Rx FCB.
4
RQ
5
6
ETU
7
VLCTL
8
Description
9
Enhanced Three-Speed Ethernet Controllers
10
11
PRO
12
PERR
13
14
15
15-163

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