MPC8313ZQADDC Freescale Semiconductor, MPC8313ZQADDC Datasheet - Page 283

• Manufacturer Part Number: MPC8313ZQADDC
• Description: Microprocessors - MPU 8313 REV2.2 PB NO ENC
• Manufacturer: Freescale Semiconductor

Specifications of MPC8313ZQADDC

• Processor Series: MPC8313
• Core: e300
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 133 MHz
• Program Memory Size: 16 KB
• Data Ram Size: 16 KB
• Interface Type: I2C
• Mounting Style: SMD/SMT
• Package / Case: PBGA
• Number Of Programmable I/os: 32
• Number Of Timers: 4

5.8.3.5
The device will support the PCI power states D0, D1, D2, D3Hot, and D3Cold as defined in the Rev. 1.2
of the PCI Power Management Interface Specification.
management specification defines a power management event, or PME, as the process by which a PCI
agent signals a request to the host for a change in its power consumption state. When in agent mode, the
device has the capability to generate PME signaling through the assertion of an external PCI_PME signal.
As host, the device is able to respond to PME signaling as a wake-up event.
It is assumed that in D3Cold all power will be removed from the device, so PCI_PME signaling is not
supported from D3Cold. Instead, an MPC8313E-specific D3Warm state is defined. The difference
between D3Hot and D3Warm is that in D3Hot the device’s entire core region is supplied with the nominal
1-V VDD supply. In D3Warm, a portion of the core region can be powered off. This partial power-down
mode allows the device to achieve significant reduction in power dissipation while still maintaining the
capability to respond to wake-up events.
Table 5-72
Freescale Semiconductor
PCI Dx Power
Ethernet Link
State
CSB Bus
D0
D1
D2
defines the PCI power states.
Support of PCI Power Management Interface Specification
MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2
Supported
e300 PPC
PHY I/F
SGMII
Yes
Yes
Yes
Table 5-72. PCI Defined Power Management State Support
eTSEC
Default state; full power; PME signaling supported through software control
e300 in Doze mode; e300 PLL running; PME signaling supported
e300 in Nap state; e300 PLL running; PME signaling supported
Figure 5-56. Power Segmentation in Deep Sleep Mode
Peripherals
System
RTC / GTM
PMC
Controller
DDR
GPIO
PCI
Table 5-72
How Supported
Local Bus
Controller
defines these Dx states. The PCI power
USB
USB
PHY
VDD domain
Switchable voltage supply
SYSTEM Power-down
USB Link
VDDC domain
Constant voltage supply
SYSTEM Power-up
System Configuration
5-75