MPC8313ZQADDC Freescale Semiconductor, MPC8313ZQADDC Datasheet - Page 369

• Manufacturer Part Number: MPC8313ZQADDC
• Description: Microprocessors - MPU 8313 REV2.2 PB NO ENC
• Manufacturer: Freescale Semiconductor

Specifications of MPC8313ZQADDC

• Processor Series: MPC8313
• Core: e300
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 133 MHz
• Program Memory Size: 16 KB
• Data Ram Size: 16 KB
• Interface Type: I2C
• Mounting Style: SMD/SMT
• Package / Case: PBGA
• Number Of Programmable I/os: 32
• Number Of Timers: 4

8.5.3
Each bit in SIPNR_H and SIPNR_L, shown in
interrupt source. (Implemented bits are listed in
interrupt controller sets the corresponding SIPNR bit. When a pending interrupt is handled, the user clears
the SIPNR bit by clearing the corresponding event register bit.
Note that SIPNR bit positions are not changed according to relative priority.
Table 8-7
and SIMSR_H.
Freescale Semiconductor
Offset 0x08
Reset
W
R
0
Interrupt ID Number
lists implemented SIPNR_H fields. Note that these field descriptions are also valid for SIFCR_H
System Internal Interrupt Pending Registers (SIPNR_H and
SIPNR_L)
MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2
92–127
81–83
86–89
84
85
90
91
Figure 8-4. System Internal Interrupt Pending Register (SIPNR_H)
Table 8-7. SIPNR_H/SIFCR_H/SIMSR_H Bit Assignments
Table 8-6. IVEC/CVEC/MVEC Field Definition (continued)
7–23
Bits
24
25
0
1
2
3
4
5
6
INT
Interrupt Meaning
n (Implemented bits are listed in
Reserved
Reserved
Reserved
GTM3
GTM7
GTM1
GTM5
Figure 8-4
Table
TSEC1 Err
TSEC2 Err
TSEC1 Rx
TSEC2 Rx
TSEC1 Tx
TSEC2 Tx
All zeros
USB DR
UART1
UART2
Field
8-7.) When an interrupt request is received, the
—
and
Figure
Integrated Programmable Interrupt Controller (IPIC)
Table
8-5, may be assigned an internal
0b101_0001–0b101_0011
0b101_0110–0b101_1001
0b101_1100–0b111_1111
8-7.)
Interrupt Vector
0b101_0100
0b101_0101
0b101_1010
0b101_1011
Access: Read only
8-11
31