MPC8313ZQADDC Freescale Semiconductor, MPC8313ZQADDC Datasheet - Page 1156

• Manufacturer Part Number: MPC8313ZQADDC
• Description: Microprocessors - MPU 8313 REV2.2 PB NO ENC
• Manufacturer: Freescale Semiconductor

Specifications of MPC8313ZQADDC

• Processor Series: MPC8313
• Core: e300
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 133 MHz
• Program Memory Size: 16 KB
• Data Ram Size: 16 KB
• Interface Type: I2C
• Mounting Style: SMD/SMT
• Package / Case: PBGA
• Number Of Programmable I/os: 32
• Number Of Timers: 4

General Purpose I/O (GPIO)
21.3.3
The GPIO data register (GPDAT), shown in
Table 21-5
21.3.4
The GPIO interrupt event register (GPIER), shown in
caused an interrupt. Each bit in GPIER, corresponds to an interrupt source. GPIER bits are cleared by
writing ones. However, writing zero has no effect.
Table 21-6
21.3.5
The GPIO interrupt mask register (GPIMR), shown in
individual ports. When a masked interrupt request occurs, the corresponding GPIER bit is set, regardless
of the GPIMR state. When one or more non-masked interrupt events occur, the GPIO module issues an
interrupt to the on chip interrupt controller.
21-4
0–31
0–31
Bits
Bits
Offset 0xC08
Reset
Offset 0xC0C
Reset
W
W
R
R
Name
Name
0
0
D n
D n
defines the bit fields of GPDAT.
defines the bit fields of GPIER.
GPIO Data Register (GPDAT)
GPIO Interrupt Event Register (GPIER)
GPIO Interrupt Mask Register (GPIMR)
MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2
Data. Write data is latched and presented on external signals if GPDIR has configured the port as an output.
Read operation always returns the data at the signal.
Interrupt events. Indicates whether an interrupt event occurred on the corresponding GPIO signal.
0 No interrupt event occurred on the corresponding GPIO signal.
1 Interrupt event occurred on the corresponding GPIO signal.
Figure 21-5. GPIO Interrupt Event Register (GPIER)
Figure 21-4. GPIO Data Register (GPDAT)
Undefined (the user should write 1s to clear before using)
Table 21-5. GP n DAT Bit Settings
Table 21-6. GPIER Bit Settings
Figure
21-4, carries the data in/out for the individual ports.
All zeros
Figure
Figure
Description
Description
D n
D n
21-5, carries information of the events that
21-6, defines the interrupt masking for the
Freescale Semiconductor
Access: Read/write
Access: w1c
31
31