MPC8313ZQADDC Freescale Semiconductor, MPC8313ZQADDC Datasheet - Page 288

• Manufacturer Part Number: MPC8313ZQADDC
• Description: Microprocessors - MPU 8313 REV2.2 PB NO ENC
• Manufacturer: Freescale Semiconductor

Specifications of MPC8313ZQADDC

• Processor Series: MPC8313
• Core: e300
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 133 MHz
• Program Memory Size: 16 KB
• Data Ram Size: 16 KB
• Interface Type: I2C
• Mounting Style: SMD/SMT
• Package / Case: PBGA
• Number Of Programmable I/os: 32
• Number Of Timers: 4

System Configuration
5.8.3.7
This section will describe the MPC8313E D0–D3 low power states, including D3Warm, from a PCI power
management perspective. The sequence of entering and exiting D0–D3 states will also be described.
The power management implementation assumes the following:
5.8.3.7.1
The ACPI 3.0 specification defines the power management interface between host and agent from a
board-level perspective. The device is intended to be usable as an agent in an ACPI-compliant system
through the PCI interface. For the agent mode, the ACPI specification defines the power-down/wake-up
sequence to be, generally:
Table 5-75
event” refers to wake-up events that are recognized by the PMC controller as agent: USB, internal timer,
external interrupt, GPIO, or eTSEC. The events must be unmasked at the PMC to cause a wake-up.
Note that the device will also begin the wake-up process if the host sets PCIPMCR1[Power_State] = 00.
In this case, the PMC will assert an interrupt to the e300 core, but this action will not set any of the wake-up
events in the PMC event register (PMCER).
5-80
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1. The host determines the capabilities of the agent. The agent may or may not have the capability to
2. The host enables the agent to generate wake-up signaling to the host.
3. The host signals the agent to transition into a low power state that it deems appropriate.
4. When the agent receives a wake-up event, it signals the host by asserting PCI_PME. The agent then
5. The host requests the agent to transition to full power state by writing the new power state into the
The core region of the device will have a segmented power supply: a constant supply segment
VDDC, and switchable supply segment VDD.
When the device is used as a PCI agent, the PCI clock (PCI_CLK / PCI_SYNC_IN) must remain
available, as this is the source of the device’s system clock. This applies to D3Warm as well. The
PCI interface will reflect this requirement in the PCI’s PMC[PME_Clock] register bit.
When the device is used as a PCI host, the PCI_CLK must also remain available.
An external host is not required to reset the device through the PCI interface when transitioning
from low-power states D1–D3Warm to the fully-powered state. Reset will need to be applied if the
device is put into D3Cold state (all power removed to the chip).
inform the host of a wake-up event from a low-power state. This capability is determined through
operating system software that identifies all PCI function power capabilities by traversing the
capabilities structure in the PCI configuration space and reading the power management
capabilities register.
waits for the host to request that it transition into the active power state.
PCI configuration space.
defines the support for wake-up when the device is used as an agent. A “defined wake-up
MPC8313E-Specific PMC Low Power States
MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2
Power State Transitions from an ACPI Perspective
Freescale Semiconductor