MPC8313ZQADDC Freescale Semiconductor, MPC8313ZQADDC Datasheet - Page 215

• Manufacturer Part Number: MPC8313ZQADDC
• Description: Microprocessors - MPU 8313 REV2.2 PB NO ENC
• Manufacturer: Freescale Semiconductor

Specifications of MPC8313ZQADDC

• Processor Series: MPC8313
• Core: e300
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 133 MHz
• Program Memory Size: 16 KB
• Data Ram Size: 16 KB
• Interface Type: I2C
• Mounting Style: SMD/SMT
• Package / Case: PBGA
• Number Of Programmable I/os: 32
• Number Of Timers: 4

Table 5-5
5.2.4.2
The alternate configuration base address register (ALTCBAR) is used to define the base address for an
alternate 1-Mbyte region of configuration space to be used by the boot sequencer. By loading the proper
boot sequencer command in the serial ROM, the base address in the ALTCBAR can be combined with the
20 bits of address offset supplied from the serial ROM to generate a 32-bit address. Thus, by configuring
this register, the boot sequencer has access to the entire memory map, one 1-Mbyte block at a time. See
Section 17.4.5, “Boot Sequencer Mode,”
The alternate configuration base address register is shown in
Table 5-6
Freescale Semiconductor
12–31
12–31
0–11
0–11
‘
‘
Bits
Bits
Offset 0x08
Reset
W
R
BASE_ADDR Identifies the12 most-significant address bits of an alternate base address used for boot sequencer
BASE_ADDR
0
defines the bit fields of IMMRBAR.
defines the bit fields of ALTCBAR.
Name
Name
—
Alternate Configuration Base Address Register (ALTCBAR)
MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2
—
ALTCBAR is not considered a local access window on its own, so the boot
sequencer must configure one of the other eight local access windows
properly to reach the desired target peripherals.
Figure 5-3. Alternate Configuration Base Address Register (ALTCBAR)
BASE_ADDR
configuration accesses.
Reserved. Write has no effect, read returns 0.
Identifies the 12 most-significant address bits of the base of the 1-Mbyte internal memory window.
Reserved. Software must write all zeros.
Table 5-5. IMMRBAR Bit Settings
Table 5-6. ALTCBAR Bit Settings
for more information.
11 12
NOTE
All zeros
Description
Description
Figure
5-3.
—
System Configuration
Access: Read/Write
5-7
31