MPC8313ZQADDC Freescale Semiconductor, MPC8313ZQADDC Datasheet - Page 46

• Manufacturer Part Number: MPC8313ZQADDC
• Description: Microprocessors - MPU 8313 REV2.2 PB NO ENC
• Manufacturer: Freescale Semiconductor

Specifications of MPC8313ZQADDC

• Processor Series: MPC8313
• Core: e300
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 133 MHz
• Program Memory Size: 16 KB
• Data Ram Size: 16 KB
• Interface Type: I2C
• Mounting Style: SMD/SMT
• Package / Case: PBGA
• Number Of Programmable I/os: 32
• Number Of Timers: 4

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PCI Error Status Register (PCI_ESR)................................................................................. 13-15
PCI Error Capture Disable Register (PCI_ECDR) ............................................................. 13-16
PCI Error Enable Register (PCI_EER) ............................................................................... 13-17
PCI Error Attributes Capture Register (PCI_EATCR) ....................................................... 13-18
PCI Error Address Capture Register (PCI_EACR) ............................................................ 13-19
PCI Error Extended Address Capture Register (PCI_EEACR).......................................... 13-20
PCI Error Data Low Capture Register (PCI_EDLCR) ....................................................... 13-20
PCI General Control Register (PCI_GCR) ......................................................................... 13-21
PCI Error Control Register (PCI_ECR).............................................................................. 13-21
PCI General Status Register (PCI_GSR) ............................................................................ 13-22
PCI Inbound Translation Address Registers (PITARn) ...................................................... 13-23
PCI Inbound Base Address Registers (PIBARn) ................................................................ 13-23
PCI Inbound Extended Base Address Registers (PIEBARn) ............................................. 13-24
PCI Inbound Window Attribute Registers (PIWARn) ........................................................ 13-24
Vendor ID Configuration Register ...................................................................................... 13-27
Device ID Configuration Register ...................................................................................... 13-27
PCI Command Configuration Register ............................................................................... 13-28
PCI Status Configuration Register ...................................................................................... 13-29
Revision ID Configuration Register ................................................................................... 13-30
Standard Programming Interface Configuration Register................................................... 13-30
Subclass Code Configuration Register ............................................................................... 13-31
Base Class Code Configuration Register ............................................................................ 13-31
Cache Line Size Configuration Register............................................................................. 13-32
Latency Timer Configuration Register ............................................................................... 13-32
Header Type Configuration Register .................................................................................. 13-33
BIST Control Configuration Register ................................................................................. 13-33
PIMMR Base Address Configuration Register................................................................... 13-33
GPL Base Address Register 0 ............................................................................................. 13-34
GPL Base Address Registers 1–2 ....................................................................................... 13-35
GPL Extended Base Address Registers 1–2 ....................................................................... 13-35
Subsystem Vendor ID Configuration Register.................................................................... 13-36
Subsystem Device ID Configuration Register .................................................................... 13-36
Capabilities Pointer Configuration Register ....................................................................... 13-37
Interrupt Line Configuration Register................................................................................. 13-37
Interrupt Pin Register .......................................................................................................... 13-37
Minimum Grant Configuration Register............................................................................. 13-38
Maximum Latency Configuration Register ........................................................................ 13-38
PCI Function Configuration Register ................................................................................. 13-38
PCI Arbiter Control Register (PCIACR) ............................................................................ 13-39
Hot Swap Register Block .................................................................................................... 13-40
PCI Power Management Register 0 (PCIPMR0)................................................................ 13-41
MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2
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