MPC8313ZQADDC Freescale Semiconductor, MPC8313ZQADDC Datasheet - Page 815

• Manufacturer Part Number: MPC8313ZQADDC
• Description: Microprocessors - MPU 8313 REV2.2 PB NO ENC
• Manufacturer: Freescale Semiconductor

Specifications of MPC8313ZQADDC

• Processor Series: MPC8313
• Core: e300
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 133 MHz
• Program Memory Size: 16 KB
• Data Ram Size: 16 KB
• Interface Type: I2C
• Mounting Style: SMD/SMT
• Package / Case: PBGA
• Number Of Programmable I/os: 32
• Number Of Timers: 4

15.5.3.6.36 Transmit Total Collision Counter (TNCL)
Figure 15-87
Table 15-91
15.5.3.6.37 Transmit Drop Frame Counter (TDRP)
Figure 15-88
Table 15-92
Freescale Semiconductor
20–31
0–19
Bits
Offset eTSEC1:0x2_470C; eTSEC2:0x2_570C
Reset
Offset eTSEC1:0x2_4714; eTSEC2:0x2_5714
Reset
16–31
0–15
Bits
W
W
R
R
Name
TNCL
0
0
—
describes the fields of the TNCL register.
describes the fields of the TDRP register.
Name
TDRP
describes the definition for the TNCL register.
describes the definition for the TDRP register.
MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2
—
Reserved
Transmit total collision counter. Increments by the number of collisions experienced during the transmission
of a frame as defined as the simultaneous presence of signals on the DO and RD circuits (That is,
transmitting and receiving at the same time). Note: This count does not include collisions that result in an
excessive collision condition.
Figure 15-87. Transmit Total Collision Counter Register Definition
Reserved
Transmit drop frame counter. Increments each time a memory error or an underrun has occurred.
Figure 15-88. Transmit Drop Frame Counter Register Definition
—
Table 15-91. TNCL Field Descriptions
Table 15-92. TDRP Field Descriptions
—
All zeros
All zeros
15 16
Description
Description
19 20
Enhanced Three-Speed Ethernet Controllers
TDRP
TNCL
Access: Read/Write
Access: Read/Write
15-97
31
31