MPC8313ZQADDC Freescale Semiconductor, MPC8313ZQADDC Datasheet - Page 291

• Manufacturer Part Number: MPC8313ZQADDC
• Description: Microprocessors - MPU 8313 REV2.2 PB NO ENC
• Manufacturer: Freescale Semiconductor

Specifications of MPC8313ZQADDC

• Processor Series: MPC8313
• Core: e300
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 133 MHz
• Program Memory Size: 16 KB
• Data Ram Size: 16 KB
• Interface Type: I2C
• Mounting Style: SMD/SMT
• Package / Case: PBGA
• Number Of Programmable I/os: 32
• Number Of Timers: 4

Case
The Dx power state transitions are supported in the PMC as indicated by the following state machine,
which includes both hardware and software implications. Note that when the device is agent and in one of
its low power modes, the host may decide to wake it up independent of a wake-up event or interrupt by
writing the D0 state into the PCI configuration registers (PCIPMR1[Power_State] = 00. This action will
cause an interrupt to the e300 (D1–D3Hot) or cause the PMC to begin the wake-up process (D3Warm).
Freescale Semiconductor
10
1
2
3
4
5
6
7
8
9
Power State
D3Warm
D3Warm
D3Cold
D3Hot
D3Hot
D0
D1
D2
D1
D2
MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2
Wake-up Event Source
Not applicable
Defined wake-up event:
USB, internal timer,
external interrupt, TSEC,
GPIO, PCI (PCI_PME)
USB, internal timer,
external interrupt, TSEC,
GPIO, PCI (PCI_PME)
USB, internal timer,
external interrupt, TSEC,
GPIO, PCI (PCI_PME)
USB, internal timer,
external interrupt, TSEC,
GPIO, PCI (PCI_PME)
Other (e.g., e300
decrementer timer, e300
snoop hit, I
Other (e.g., e300
decrementer timer, I
Other (e.g., I
Other
Not available
Table 5-76. MPC8313E Host Mode Wake-Up Support
2
C)
2
C)
2
C)
The wake-up event causes PMC to interrupt the e300 through the IPIC. The
e300 transitions from Doze mode to Full On mode. If the wake-up source
was the PCI_PME input the e300 OS may direct a power state change to
the remote agent.
Same as Case 2, except e300 transitions to Full On mode from Nap mode.
Same as Case 2, except e300 transitions to Full On mode from Sleep mode
Same as Case 2, except the e300 is powered off. External power will be
re-applied and the e300 will be required to initialize a portion of the device
(DDR, IPIC etc.) before the transition to D0 is complete.
e300 is in Doze mode; when an e300 interrupt occurs, the e300 transitions
to Full On mode.
e300 is in Nap mode; when an e300 interrupt occurs, the e300 transitions
to Full On mode.
to Full On mode.
Not applicable; e300, IPIC, and other non-essential blocks are powered off.
off. Wake-up events are not recognized by the device in this case. Returning
to D0 implies a POR reset and a complete initialization of the device.
Active state, normal system activity
e300 is in Sleep mode; when an e300 interrupt occurs, the e300 transitions
It is assumed that in D3Cold VDDC and VDD power supplies are powered
Action
System Configuration
5-83