MPC8313ZQADDC Freescale Semiconductor, MPC8313ZQADDC Datasheet - Page 776

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MPC8313ZQADDC

Manufacturer Part Number
MPC8313ZQADDC
Description
Microprocessors - MPU 8313 REV2.2 PB NO ENC
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MPC8313ZQADDC

Processor Series
MPC8313
Core
e300
Data Bus Width
16 bit
Maximum Clock Frequency
133 MHz
Program Memory Size
16 KB
Data Ram Size
16 KB
Interface Type
I2C
Mounting Style
SMD/SMT
Package / Case
PBGA
Number Of Programmable I/os
32
Number Of Timers
4

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
MPC8313ZQADDC
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Enhanced Three-Speed Ethernet Controllers
Table 15-34
15-58
Offset eTSEC1:0x2_433C; eTSEC2:0x2_533C
Reset
Reset
0000 0–31
0001 0–13
PID
\
W
W
1
R
R
28–29
EBC
Bit
14
15
16
17
18
19
20
21
22
23
24
25
26
27
30
31
16
0
describes the fields of the RQFPR register.
MASK Mask bits to be written to Filer mask_register for masking of property values. The rule match/fail status
Name
VLN
ARQ Set if an ARP request packet is seen.
UDP Set if a UDP header was parsed.
EBC Set if the destination Ethernet address is to the broadcast address.
JUM Set if a jumbo Ethernet frame was parsed.
TCP
PER Set on a parse error, such as header inconsistency.
EER Set on an Ethernet framing error that prevents parsing.
MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2
VLN
ICC
CFI
IPF
ICV
IP4
IP6
17
AR
Figure 15-30. Receive Queue Filer Table Property ID1 Register Definition
for this PID is determined by RQCTRL[CMP]. Since mask_register is bit-wise ANDed with properties,
every bit of MASK that is cleared also results in the corresponding property bit being cleared in
comparisons. Therefore setting MASK to 0xFFFF_FFFF ensures that all property bits participate in rule
matches.
Reserved
Set if an ARP response packet is seen.
Set if a VLAN tag (Ethertype DFVLAN[TAG] or 0x8100) was seen in the frame.
Set to the value of the Canonical Format Indicator in the VLAN control tag if VLAN is set, zero otherwise.
Set if a fragmented IPv4 or IPv6 header was encountered.
See the descriptions of receive FCB fields IP and PRO in
more information on determining the status of received packets for which IPF is set.
Reserved
Set if an IPv4 header was parsed.
Set if an IPv6 header was parsed.
Set if the IPv4 header checksum was checked.
Set if the IPv4 header checksum was verified correct.
Set if a TCP header was parsed.
Reserved.
CFI
18
JUM
19
IPF
20
Table 15-34. RQFPR Field Descriptions
FIF
21
IP4
22
IP6
23
All zeros
All zeros
Description
ICC
24
ICV
25
Section 15.6.3.3, “Receive Path
TCP
26
UDP
27
28
Freescale Semiconductor
Access: Read/Write
29
Off-Load,” for
PER
30
EER
15
31

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