MPC8313ZQADDC Freescale Semiconductor, MPC8313ZQADDC Datasheet - Page 292

• Manufacturer Part Number: MPC8313ZQADDC
• Description: Microprocessors - MPU 8313 REV2.2 PB NO ENC
• Manufacturer: Freescale Semiconductor

Specifications of MPC8313ZQADDC

• Processor Series: MPC8313
• Core: e300
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 133 MHz
• Program Memory Size: 16 KB
• Data Ram Size: 16 KB
• Interface Type: I2C
• Mounting Style: SMD/SMT
• Package / Case: PBGA
• Number Of Programmable I/os: 32
• Number Of Timers: 4

System Configuration
5.8.3.7.2
The following sections describe the sequence of events that occur when entering or exiting the device’s
lowest power state (D3Warm). Host and agent cases are described separately.
PMC Power-Down When the MPC8313E is a PCI Agent
In this case the PCI device driver runs on an external PCI host. It interfaces to the device through PCI
configuration interface.
5-84
NOTES:
1) Wake-up case #1: Wake-up will occur as a result of one of the following: e300 interrupt or bus activity, PMCER[X] &
PMCMR[X] = 1, where X is one of {USB, TSEC, GPIO, PCI, interrupt, timer}, PMCCR1[NEXT_STATE] = 00. The device
will wake-up directly as host or agent. PCI_PME can be generated manually to host if desired.
2) Wake-up case #2: As host (PMCCR[PME_EN] = 0), Wake-up will occur as a result of one of the following: PMCER[X]
& PMCMR[X] = 1, where X is one of {USB, TSEC, GPIO, PCI, interrupt, timer}. As agent (PMCCR[PME_EN]=1) wake-up
event will cause PCI_PME to be asserted; the device will wake up when the host sets PCIPMR1[Power_State] = 00, which
causes PMCCR1[NEXT_STATE] = 00.
3) Before the transition to D3Warm, VDD power is switched off. VDDC remains constant.
4) Before the transition from D3Warm, VDD power is switched on.
5) D1, D2 & D3Hot modes are supported through use of the e300 Doze, Nap, and Sleep modes respectively. Transitions
from D1–D3Hot are triggered as follows: the e300 internal time base unit invokes a request to exit low power state or e300
receives an interrupt request, including interrupt from a defined wake-up event.
6) Transitions to D3Cold implies power-down of VDDC and VDD supplies.
7) Transitions from D3Warm go to the D0-non-initialized state, meaning a portion of the chip (e300, DDR etc.) will need
to be initialized. Portions of the chip which are not powered-off may not need to be initialized.
Power Down
VDDC,VDD
MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2
States
Cold
MPC8313E Low Power Sequencing
D3
All
PMCCR1[NEXT_STATE]=01b
PORESET
Active
D0
Figure 5-57. Power State Transitions Supported
PMCCR1[NEXT_STATE]=00b || int
SW Initialization
PMCCR1[NEXT_STATE]=00b
PMCCR1[NEXT_STATE]=10b
|| bus activity)
PMCCR1[POWER_OFF]=1
Not initialized
&& PMCCR1[POWER_OFF]=0
PMCCR1[NEXT_STATE]=11b
D0
D1
PMCCR1[NEXT_STATE]=00b
PMCCR[GPIO]=1b || PMCR[Timer]=1 ||
Warm
D3
{PMCCR[eTSEC1]=1b ||
PMCR[Interrupt]=1b}
D2
Hot
Freescale Semiconductor
D3