MPC8313ZQADDC Freescale Semiconductor, MPC8313ZQADDC Datasheet - Page 1104

• Manufacturer Part Number: MPC8313ZQADDC
• Description: Microprocessors - MPU 8313 REV2.2 PB NO ENC
• Manufacturer: Freescale Semiconductor

Specifications of MPC8313ZQADDC

• Processor Series: MPC8313
• Core: e300
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 133 MHz
• Program Memory Size: 16 KB
• Data Ram Size: 16 KB
• Interface Type: I2C
• Mounting Style: SMD/SMT
• Package / Case: PBGA
• Number Of Programmable I/os: 32
• Number Of Timers: 4

I
17-20
2
C Interfaces
Master Xmit
Generate
STOP
Master Rcv
I2CCR[TXAK]
Write next byte
MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2
Set
to I2CDR
Y
EOI
Next-to-last
I2CCR[TXAK]
N
byte
N
Y
Figure 17-11. Example I
Set
I2CCR[MTX]
== 1
End of address phase for
Last byte
master receive mode?
== 1
Read I2CDR
Last byte
and store
Y
N
EOI
Clear I2CCR[MTX]
A
(dummy read)
Only one byte
Read I2CDR
I2CSR[RXAK]
to receive?
N
Generate
STOP
== 0
== 0
Y
Y
N
A
== 1
2
C Interrupt Service Routine Flowchart
Clear I2CSR[MIF]
Slave Xmit
I2CCR[MSTA]
Slave Data Cycle
Clear I2CCR[MTX]
(dummy read)
Read I2CDR
Clear I2CSR[MAL]
== 1
I2CSR[MAAS]
Slave Addr. Phase
EOI
Set I2CCR[MTX]
I2CSR[RXAK]
== 0
Write I2CDR
== 0
== 1
== 1
Write next byte
== 0
to I2CDR
== 1
== 1
I2CSR[MAL]
EOI
I2CSR[SRW]
B
EOI
I2CCR[MTX]
B
I2CSR[MAAS]
Clear I2CCR[MTX]
Slave Received
dummy read
== 0
== 0
Set I2CCR[TXAK]
== 0
N
Freescale Semiconductor
== 0
Read I2CDR
All done
and store
== 1
Y
B