MPC8313ZQADDC Freescale Semiconductor, MPC8313ZQADDC Datasheet - Page 1053

• Manufacturer Part Number: MPC8313ZQADDC
• Description: Microprocessors - MPU 8313 REV2.2 PB NO ENC
• Manufacturer: Freescale Semiconductor

Specifications of MPC8313ZQADDC

• Processor Series: MPC8313
• Core: e300
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 133 MHz
• Program Memory Size: 16 KB
• Data Ram Size: 16 KB
• Interface Type: I2C
• Mounting Style: SMD/SMT
• Package / Case: PBGA
• Number Of Programmable I/os: 32
• Number Of Timers: 4

16.7.1.2
The seven DWords in the overlay area represent a transaction working space for the device controller. The
general operational model is that the device controller can detect whether the overlay area contains a
description of an active transfer. If it does not contain an active transfer, then it will not read the associated
endpoint.
After an endpoint is readied, the dTD will be copied into this queue head overlay area by the device
controller. Until a transfer is expired, software must not write the queue head overlay area or the associated
transfer descriptor. When the transfer is complete, the device controller will write the results back to the
original transfer descriptor and advance the queue.
See dTD for a description of the overlay fields.
16.7.1.3
The current dTD pointer is used by the device controller to locate the transfer in progress. This word is for
USB_DR (hardware) use only and should not be modified by DCD software.
16.7.1.4
The setup buffer is dedicated storage for the 8-byte data that follows a setup PID.
Freescale Semiconductor
26–16
14–0
31–5
Bits
Bits
4–0
15
Current dtd. This field is a pointer to the dTD that is represented in the transfer overlay area. This field will be modified
by the Device Controller to next dTD pointer during endpoint priming or queue advance.
Reserved, should be cleared. Bit reserved for future use and should be cleared.
Maximum
Length
Packet
Name
ios
Transfer Overlay
Current dTD Pointer
Setup Buffer
MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2
Each endpoint has a TX and an RX dQH associated with it, and only the RX
queue head is used for receiving setup data packets.
Maximum packet length. This directly corresponds to the maximum packet size of the associated endpoint
(wMaxPacketSize). The maximum value this field may contain is 0x400 (1024).
Interrupt on setup (IOS). This bit is used on control type endpoints to indicate if USBINT is set in response
to a setup being received.
Reserved, should be cleared. Bits reserved for future use and should be cleared.
Table 16-75. Endpoint Capabilities/Characteristics (continued)
Table 16-76. Current dTD Pointer
NOTE
Description
Description
Universal Serial Bus Interface
16-125