MPC8313ZQADDC Freescale Semiconductor, MPC8313ZQADDC Datasheet - Page 995

• Manufacturer Part Number: MPC8313ZQADDC
• Description: Microprocessors - MPU 8313 REV2.2 PB NO ENC
• Manufacturer: Freescale Semiconductor

Specifications of MPC8313ZQADDC

• Processor Series: MPC8313
• Core: e300
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 133 MHz
• Program Memory Size: 16 KB
• Data Ram Size: 16 KB
• Interface Type: I2C
• Mounting Style: SMD/SMT
• Package / Case: PBGA
• Number Of Programmable I/os: 32
• Number Of Timers: 4

16.5.7.1
The first DWord of an FSTN contains a link pointer to the next schedule object. This object can be of any
valid periodic schedule data type.
16.5.7.2
The second DWord of an FTSN node contains a link pointer to a queue head. If the T-bit in this pointer is
a zero, then this FSTN is a Save-Place indicator. Its Typ field must be set by software to indicate the target
data structure is a queue head. If the T-bit in this pointer is set, then this FSTN is the Restore indicator.
When the T-bit is a one, the host controller ignores the Typ field.
16.6
The general operational model for the USB DR module in host mode is defined by the Enhanced Host
Controller Interface (EHCI) Specification. The EHCI specification describes the register-level interface
for a host controller for the USB Revision 2.0. It includes a description of the hardware/software interface
Freescale Semiconductor
31–5
31–5
Bits
Bits
4–3
2–1
4–3
2–1
0
0
Name
Name
NPLP Normal path link pointer. Contains the address of the next data object to be processed in the periodic list and
BPLP
Typ
Typ
Host Operations
—
—
T
T
FTSN Normal Path Pointer
FSTN Back Path Link Pointer
MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2
corresponds to memory address signals [31:5], respectively.
Reserved, should be cleared. These bits must be written as 0s.
Indicates to the host controller whether the item referenced is a iTD/siTD, QH, or FSTN. This allows the host
controller to perform the proper type of processing on the item after it is fetched.
00 iTD (isochronous transfer descriptor)
01 QH (queue head)
10 siTD (split transaction isochronous transfer descriptor)
11 FSTN (frame span traversal node)
Terminate.
0 Link pointer is valid.
1 Link pointer field is not valid.
Back path link pointer. Contains the address of a queue head. This field corresponds to memory address
signals [31:5], respectively.
Reserved, should be cleared. These bits must be written as 0s.
Software must ensure this field is set to indicate the target data structure is a Queue Head (01). Any other
value in this field yields undefined results.
Terminate.
0 Link pointer is valid (that is, the host controller may use bits 31–5 (in combination with the
1 Link pointer field is not valid (that is, the host controller must not use bits 31–5 (in combination with the
CTRLDSSEGMENT register if applicable) as a valid memory address). This value also indicates that this
FSTN is a Save-Place indicator.
CTRLDSSEGMENT register if applicable) as a valid memory address). This value also indicates that this
FSTN is a Restore indicator.
Table 16-63. FSTN Back Path Link Pointer
Table 16-62. FTSN Normal Path Pointer
Description
Description
Universal Serial Bus Interface
16-67