MPC8313ZQADDC Freescale Semiconductor, MPC8313ZQADDC Datasheet - Page 1170

• Manufacturer Part Number: MPC8313ZQADDC
• Description: Microprocessors - MPU 8313 REV2.2 PB NO ENC
• Manufacturer: Freescale Semiconductor

Specifications of MPC8313ZQADDC

• Processor Series: MPC8313
• Core: e300
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 133 MHz
• Program Memory Size: 16 KB
• Data Ram Size: 16 KB
• Interface Type: I2C
• Mounting Style: SMD/SMT
• Package / Case: PBGA
• Number Of Programmable I/os: 32
• Number Of Timers: 4

Revision History
MxMR[AM] = 001
MxMR[AM] = 010
MxMR[AM] = 011
MxMR[AM] = 100
MxMR[AM] = 101
MxMR[AM] = 110
MxMR[AM] = 111
10.4.4.4.7, 10-84
10.4.4.5, 10-86
A-12
AMX = 10
AMX = 00
AMX = 10
AMX = 00
AMX = 10
AMX = 00
AMX = 10
AMX = 00
AMX = 10
AMX = 00
AMX = 10
AMX = 10
(Row)
(Row)
(Row)
(Row)
(Row)
(Col)
(Col)
(Col)
(Col)
(Col)
ms
b
0
MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2
1
AMX must not change values in any RAM word which begins a loop.
2
10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25
3
10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25
Added the following note at the end of the section:
Replaced second paragraph with the following:
However, programming WAEN = 1 and UTA = 1 in the same RAM word, under
certain conditions, allows the UPM to treat LUPWAIT as a synchronous signal,
which must meet set-up and hold times in relation to the rising edge of the bus
clock. The conditions are as follows:
• The PLL must be enabled, that is, LCRR[PBYP] = 0.
• DLT3 bit must be cleared in the same RAM word to avoid mid-sampling of
• LBCR[LPBSE] = 0 and MXMR[GPL4] = 1
• The combination WAEN = 1 and UTA = 1 should be in the RAM word next to
4
10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25
Table 10-40. UPM Address Multiplexing (continued)
read data.
the word which gets frozen by LUPWAIT assertion. This condition limits the
use of this mode to cases where the exact cycle of LUPWAIT assertion is
predictable.
5
LAD
10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
6
LAD
10 11 12 13 14 15 16 17 18 19 20 21 22 23
7
LAD
8
LAD
9
LAD
10 11 12 13 14 15 16 17 18 19 20
Internal Transaction Address
NOTE
LA
LA
Reserved
Reserved
LA
LA
LA
13 14
14
LAD
LAD
LAD
21
24
25
15
15
15
22 23 24 25 26 27 28 29 30 31
25
16 17 18 19 20 21 22 23 24 25
16 17 18 19 20 21 22 23 24 25
16 17 18 19 20 21 22 23 24 25
16 17 18 19 20 21 22 23 24 25
17 18 19 20 21 22 23 24 25
Freescale Semiconductor
LA
LA
LA
LA
LA
lsb