MPC8313ZQADDC Freescale Semiconductor, MPC8313ZQADDC Datasheet - Page 150

• Manufacturer Part Number: MPC8313ZQADDC
• Description: Microprocessors - MPU 8313 REV2.2 PB NO ENC
• Manufacturer: Freescale Semiconductor

Specifications of MPC8313ZQADDC

• Processor Series: MPC8313
• Core: e300
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 133 MHz
• Program Memory Size: 16 KB
• Data Ram Size: 16 KB
• Interface Type: I2C
• Mounting Style: SMD/SMT
• Package / Case: PBGA
• Number Of Programmable I/os: 32
• Number Of Timers: 4

Signal Descriptions
Table 3-2
3-16
1
2
3
4
LSRCID2
LSRCID3
LSRCID4
LDVAL
CFG_CLKIN_DIV
CFG_LBIU_MUX_EN
CKSTOP_IN
CKSTOP_OUT
CPCI_HS_ENUM
CPCI_HS_ES
CPCI_HS_LED
EXT_PWR_CTRL
The LB_POR_CFG_BOOT_ECC_DIS function will be selected on the TSEC_MDC pin whenever HRESET is
asserted; the pin will act as TSEC_MDC at all other times. The reset block will sample this signal on PORESET
negation only; the sampled value is then passed to the eLBC controller to enable/disable ECC checking during boot
time. An internal pull-down resistor has been added to this pad to enable the boot-time ECC checking by default. A
pull-up resistor, via a three-state buffer, is needed during HRESET assertion period to disable ECC checking during
boot time.
See
See the MPC8313E Hardware Specification for resistor values.
Must be connected to a 10K ±1% precision resistor if using the integrated USB PHY through the UTMI.
lists the signals in alphabetical order.
Table 3-3
Name
Name
MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2
Table 3-1. MPC8313E Signal Reference by Functional Block (continued)
for proper connection to power.
Memory debug
source ID 2
Memory debug
source ID 3
Memory debug
source ID 4
Memory debug data
valid
Configuration clock
in division selection
Selects multiplexing
for address/data bus
of the eLBC block
Clock stop in
Clock stop out
CompactPCI hot
swap enumerator
CompactPCI hot
swap ejector switch
CompactPCI hot
swap LED
External power
control
Table 3-2. MPC8313E Signal Reference by Signal Name
Description
Description
Functional
Functional
Reset and
Reset and
Reset and
Reset and
Debug
Debug
Debug
Debug
Block
Block
clock
clock
clock
clock
PMC
PCI
PCI
PCI
Signals
Signals
No. of
No. of
1
1
1
1
1
1
1
1
1
1
1
1
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
O
O
I
I
I
10-2/10-5
10-2/10-5
10-2/10-5
10-2/10-5
13-3/13-5
13-3/13-5
13-3/13-5
5-65/5-66
3-3/3-29
3-6/3-31
4-3/4-5
4-3/4-5
Table/
Table/
Page
Page
TSEC_1588_ALARM2
TSEC_1588_TRIG1
LBC_PM_REF_10/
GPIO28/SPIMOSI
GPIO29/SPIMISO
GTM1_TGATE3/
GTM2_TGATE4/
Freescale Semiconductor
USBDR_PCTL0
USBDR_PCTL1
GTM1_TOUT1/
GTM1_TIN3/
GTM2_TIN4/
Function(s)
Function(s)
PCI_GNT2
PCI_REQ1
PCI_GNT1
IIC1_SCL/
IIC1_SDA/
Alternate
Alternate
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