MPC8313ZQADDC Freescale Semiconductor, MPC8313ZQADDC Datasheet - Page 808

• Manufacturer Part Number: MPC8313ZQADDC
• Description: Microprocessors - MPU 8313 REV2.2 PB NO ENC
• Manufacturer: Freescale Semiconductor

Specifications of MPC8313ZQADDC

• Processor Series: MPC8313
• Core: e300
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 133 MHz
• Program Memory Size: 16 KB
• Data Ram Size: 16 KB
• Interface Type: I2C
• Mounting Style: SMD/SMT
• Package / Case: PBGA
• Number Of Programmable I/os: 32
• Number Of Timers: 4

Enhanced Three-Speed Ethernet Controllers
15.5.3.6.22 Receive Fragments Counter (RFRG)
Figure 15-73
Table 15-77
15.5.3.6.23 Receive Jabber Counter (RJBR)
Figure 15-74
Table 15-78
15-90
16–31
16–31
0–15
0–15
Bits
Bits
Offset eTSEC1:0x2_46D4; eTSEC2:0x2_56D4
Offset eTSEC1:0x2_46D8; eTSEC2:0x2_56D8
Reset
Reset
W
W
R
R
RFRG
Name
Name
RJBR
0
0
—
—
describes the fields of the RFRG register.
describes the fields of the RJBR register.
describes the definition for the RFRG register.
describes the definition for the RJBR register.
MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2
Reserved
contains an invalid FCS. This includes integral and non-integral lengths.
Receive fragments counter. Increments for each frame received which is less than 64 bytes in length and
Reserved
Receive jabber counter. Increments for frames received which exceed 1518 (non VLAN) or 1522 (VLAN)
bytes and contain an invalid FCS. This includes alignment errors.
Figure 15-73. Receive Fragments Counter Register Definition
Figure 15-74. Receive Jabber Counter Register Definition
—
—
Table 15-77. RFRG Field Descriptions
Table 15-78. RJBR Field Descriptions
All zeros
All zeros
15 16
15 16
Description
Description
RFRG
RJBR
Freescale Semiconductor
Access: Read/Write
Access: Read/Write
31
31