MPC8313ZQADDC Freescale Semiconductor, MPC8313ZQADDC Datasheet - Page 952

• Manufacturer Part Number: MPC8313ZQADDC
• Description: Microprocessors - MPU 8313 REV2.2 PB NO ENC
• Manufacturer: Freescale Semiconductor

Specifications of MPC8313ZQADDC

• Processor Series: MPC8313
• Core: e300
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 133 MHz
• Program Memory Size: 16 KB
• Data Ram Size: 16 KB
• Interface Type: I2C
• Mounting Style: SMD/SMT
• Package / Case: PBGA
• Number Of Programmable I/os: 32
• Number Of Timers: 4

Universal Serial Bus Interface
16.3.2.12 ULPI Register Access (ULPI VIEWPORT)
The register provides indirect access to the ULPI PHY register set. Although the controller modules
perform access to the ULPI PHY register set, there may be extraordinary circumstances where software
may need direct access. Be advised that writes to the ULPI through the ULPI viewport can substantially
harm standard USB operations. Currently no usage model has been defined where software should need
to execute writes directly to the ULPI. Note that executing read operations though the ULPI viewport
should have no harmful side effects to standard USB operations. Also note that if the ULPI interface is not
enabled, this register will always read zeros.
ULPI VIEWPORT is shown in
16-24
Offset 0x2_3170
Reset
Reset
Bits
7–0
W
W
R
R
ULPIWU ULPIRUN ULPIRW
31
15
TXSCHOH
Name
MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2
30
Table 16-20. TXFILLTUNING Register Field Descriptions (continued)
Scheduler overhead. These bits add an additional fixed offset to the schedule time estimator
described above as T
number of back-off events captured in the TXSCHHEALTH to less than 10 per second in a highly
utilized bus. Choosing a value that is too high for this register is not desired as it can needlessly
reduce USB utilization.
The time unit represented in this register is 1.267μs when a device is connected in high-speed
mode.
The time unit represented in this register is 6.333μs when a device is connected in low-/full-speed
mode.
For most applications, TXSCHOH can be set to 4 or less. A good value to begin with is:
TXFIFOTHRES × (BURSTSIZE × 4 bytes-per-word) ÷ (40 × TimeUnit ), always rounded to the next
higher integer. TimeUnit is either 1.267 or 6.333 as noted earlier in this description. For example, if
TXFIFOTHRES is 5 and BURSTSIZE is 8, then set TXSCHOH to 5×(8×4)÷(40×1.267)=4 for a
high-speed link. If this value of TXSCHOH results in a TXSCHHEALTH count of 0 per second, try
lowering the value by 1 if optimizing performance is desired. If TXSCHHEALTH exceeds 10 per
second, try raising the value by 1.
If streaming mode is disabled via the USBMODE register, treat TXFIFOTHRES as the maximum
value for purposes of the TXSCHOH calculation.
ULPIDATRD
Figure 16-18. ULPI Register Access (ULPI VIEWPORT)
29
Figure
28
—
ULPISS
16-18.
27
ff
. As an approximation, the value chosen for this register should limit the
26
ULPIPORT
All zeros
All zeros
24
8
23
Description
7
ULPIDTWR
ULPIADDR
Freescale Semiconductor
Access: Mixed
16
0