MPC8313ZQADDC Freescale Semiconductor, MPC8313ZQADDC Datasheet - Page 278

• Manufacturer Part Number: MPC8313ZQADDC
• Description: Microprocessors - MPU 8313 REV2.2 PB NO ENC
• Manufacturer: Freescale Semiconductor

Specifications of MPC8313ZQADDC

• Processor Series: MPC8313
• Core: e300
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 133 MHz
• Program Memory Size: 16 KB
• Data Ram Size: 16 KB
• Interface Type: I2C
• Mounting Style: SMD/SMT
• Package / Case: PBGA
• Number Of Programmable I/os: 32
• Number Of Timers: 4

System Configuration
5.8.2.3
The power management controller mask register (PMCMR), shown in
PMCIE bit whether the PMC interrupt request to the PowerPC core is enabled. The PMC interrupt request
causes the PowerPC core to exit its low power state before any transaction on the system bus occurs. Bits
23–30 are mask bits for the defined low power wake-up events.
Table 5-69
5.8.2.4
The power management controller configuration register 1 (PMCCR1), shown in
sequencing of the device into its low power state including PME (power management event) signaling,
toggling of the external power switch, and indication of current and desired power states.
5-70
23–30
0–22
Offset 0x00B08
Reset
Reset
Bits
31
W
W
R
R
16
0
GPIO, PCI(PME),
eTSEC2, Timer,
USB, eTSEC1,
defines the bit fields of PMCMR.
Int1, Int2
Power Management Controller Mask Register (PMCMR)
PMCIE
Power Management Controller Configuration Register 1 (PMCCR1)
MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2
Name
The user is also required to enable the PMC interrupt in the programmable
interrupt controller by setting SIMSR_L[PMC].
—
—
Figure 5-53. Power Management Controller Mask Register
Reserved. Write has no effect, read returns 0.
Wake-up event masking.
0 Mask wake-up events from Int2, Int1, Timer, eTSEC2, eTSEC1, USB, PCI, or GPIO,
1 Do not mask wake-up events
Power management controller interrupt enable.
0 PMC interrupt request (PMCI) is disabled.
1 PMC interrupt request (PMCI) is enabled.
respectively.
22
GPIO
23
Table 5-69. PMCMR Bit Settings
PCI (PME)
24
NOTE
All zeros
All zeros
USB
—
25
Description
eTSEC1
26
eTSEC2 Timer
Figure
27
5-53, controls through the
28
Figure
Freescale Semiconductor
Int1
29
Access: Read/Write
5-54, controls the
Int2
30
PMCIE
15
31