MPC8313ZQADDC Freescale Semiconductor, MPC8313ZQADDC Datasheet - Page 1160

• Manufacturer Part Number: MPC8313ZQADDC
• Description: Microprocessors - MPU 8313 REV2.2 PB NO ENC
• Manufacturer: Freescale Semiconductor

Specifications of MPC8313ZQADDC

• Processor Series: MPC8313
• Core: e300
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 133 MHz
• Program Memory Size: 16 KB
• Data Ram Size: 16 KB
• Interface Type: I2C
• Mounting Style: SMD/SMT
• Package / Case: PBGA
• Number Of Programmable I/os: 32
• Number Of Timers: 4

TSEC_TMR_CLK
TSEC_TMR_GCLK
TSEC_TMR_PP1
TSEC_TMR_PP2
TSEC_TMR_PP3
TSEC_TMR_TRIG1
TSEC_TMR_TRIG2
TSEC_TMR_ALARM1 1588 timer; current
TSEC_TMR_ALARM2 1588 timer; current
Revision History
2.3, 2-2
2.3, 2-29
Chapter 3, Throughout Updated signals for Rev 2.1 silicon.
3.1, 3-2
3.1, 3-7
1
3.1, 3-7
A-2
TSEC_MDC
0x3_1BF8
The LB_POR_CFG_BOOT_ECC_DIS function will be selected on the TSEC_MDC pin whenever HRESET is asserted; the
pin will act as TSEC_MDC at all other times. The reset block will sample this signal on PORESET negation only; the sampled
value is then passed to the eLBC controller to enable/disable ECC checking during boot time.
IP block revision register
MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2
1588 external timer
reference clock input
1588 timers
1588 timer pulse per
period 1
period 2
1588 timer pulse per
period 3
1588 external timer
trigger input 1
1588 external timer
trigger input 2
time is equal to or
greater than alarm
time comparator
register
time is equal to or
greater than alarm
time comparator
register
1588 timer pulse per
Ethernet
management
data clock
• Supports Wake-on-USB, a method for bringing the device from standby mode
• Host and device support
Deleted Table 2-1 and renumbered rest of tables in section.
In Table 2-2, changed the following row to read:
In Figure 3-1, added LB_POR_CFG_BOOT_ECC_DIS to the TSEC_MDC
signal.
In Table 3-1, changed TSEC_MDC row and added a footnote as follows:
In Table 3-1, added the following rows after TSEC_MDIO:
to full operating mode
management
Ethernet
eTSEC
eTSEC
eTSEC
eTSEC
eTSEC
eTSEC
eTSEC
eTSEC
eTSEC
1
1
1
1
1
1
1
1
1
1
O
O
O
O
O
O
O
I
I
I
15-2/15-8
R
15-2/15-8
15-2/15-8
15-2/15-8
15-2/15-8
15-2/15-8
15-2/15-8
15-2/15-8
15-2/15-8
15-2/15-8
0x0000_0000
_0002_00A0
LB_POR_CFG_BOOT
UART_SOUT2/LA10
UART_CTS[2]/LA12
UART_RTS[2]/LA13
UART_SIN2/LA11
IIC1_SDA/LA14
IIC1_SCL/LA15
_ECC_DIS
GPIO14/LA9
LA7
LA8
Freescale Semiconductor
1
14.6.4.6/14-73
—