MPC8313ZQADDC Freescale Semiconductor, MPC8313ZQADDC Datasheet - Page 1100

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MPC8313ZQADDC

Manufacturer Part Number
MPC8313ZQADDC
Description
Microprocessors - MPU 8313 REV2.2 PB NO ENC
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MPC8313ZQADDC

Processor Series
MPC8313
Core
e300
Data Bus Width
16 bit
Maximum Clock Frequency
133 MHz
Program Memory Size
16 KB
Data Ram Size
16 KB
Interface Type
I2C
Mounting Style
SMD/SMT
Package / Case
PBGA
Number Of Programmable I/os
32
Number Of Timers
4

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I
Boot sequencer mode also supports an extension of the standard I
to allow for EEPROM devices that have more than 256 bytes. This extended addressing mode is selectable
using a different encoding in the BOOTSEQ field of the high-order reset configuration word (see
Section 4.3.2.2.3, “Boot Sequencer
and the maximum number of registers is limited by the size of the EEPROM.
If the standard I
Then it issues a repeated start and addresses the next EEPROM address. This sequence continues until the
CONT bit is cleared. If the last register is not detected before wrapping back to the first address, an error
condition is detected. In other words, if the CONT bit for not cleared on the final 7 bytes, an error condition
is detected, causing the I
long as the continue (CONT) bit is set in the EEPROM. The CONT bit resides in the address/attributes
field that is transferred from the EEPROM, as described in
There should be no other I
17.4.5.1
The reset configuration word can be loaded by using the I
Sequencer Configuration.”
Note that this usage does not prevent using the I
functional mode, after reset state has completed. However, an I
type must be used and the first two EEPROM data structures must contain dedicated reset information.
17.4.5.2
The EEPROM calling address is 0b101_0000. The first EEPROM to be addressed must be programmed
to respond to this address, or an error is generated. Any additional EEPROMs are addressed in sequential
order.
17.4.5.3
The I
shows an example of the EEPROM contents, including the preamble, data format, and CRC.
17-16
2
C Interfaces
2
C module expects a particular format for data to be programmed in the EEPROM.
Using the Boot Sequencer for Reset Configuration
EEPROM Calling Address
EEPROM Data Format
MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2
2
C interface is used, the I
2
C controller to hang. The I
2
C traffic when the boot sequencer is active.
Configuration.”) In this mode, only one EEPROM device can be used
2
C module addresses the first EEPROM, and reads 256 bytes.
2
C boot sequencer to initiate the device in the normal
2
C module continues to read from the EEPROM as
2
Section 17.4.5.2, “EEPROM Calling Address.”
C boot sequencer. See
2
C serial EEPROM of extended addressing
2
C interface that uses more address bits
Section 4.3.2.2.3, “Boot
Freescale Semiconductor
Figure 17-9

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