MPC8313ZQADDC Freescale Semiconductor, MPC8313ZQADDC Datasheet - Page 1179

• Manufacturer Part Number: MPC8313ZQADDC
• Description: Microprocessors - MPU 8313 REV2.2 PB NO ENC
• Manufacturer: Freescale Semiconductor

Specifications of MPC8313ZQADDC

• Processor Series: MPC8313
• Core: e300
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 133 MHz
• Program Memory Size: 16 KB
• Data Ram Size: 16 KB
• Interface Type: I2C
• Mounting Style: SMD/SMT
• Package / Case: PBGA
• Number Of Programmable I/os: 32
• Number Of Timers: 4

ULPI VIEWPORT is shown in Figure 16-18.
There are two operations that can be performed with the ULPI viewport, wakeup and read /write
operations. The wakeup operation is used to put the ULPI interface into normal operation mode and
re-enable the clock if necessary. A wakeup operation is required before accessing the registers when the
ULPI interface is operating in low power mode, serial mode, or carkit mode. The ULPI state can be
determined by reading the sync state bit (ULPISS). If this bit is set, then the ULPI interface is running in
normal operation mode and can accept read/write operations. If the ULPISS is cleared, then read/write
Freescale Semiconductor
Offset 0x2_3170
Reset
Reset
26–24
23–16
15–8
Bits
7–0
31
30
29
28
27
W
W
R
R
ULPIWU ULPIRUN ULPIRW
31
15
ULPIDATRD
ULPIDTWR
ULPIADDR
ULPIPORT
MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2
ULPIRUN
ULPIWU
ULPIRW
ULPISS
Name
—
30
ULPIDATRD
Figure 16-18. ULPI Register Access (ULPI VIEWPORT)
29
ULPI Wake Up. Writing 1 to this bit begins the wakeup operation. This bit automatically
transitions to 0 after the wakeup is complete. Once this bit is set, it can not be cleared by
software.
Note: The driver must never execute a wakeup and a read/write operation at the same time.
ULPI Run. Writing 1 to this bit begins a read/write operation. This bit automatically transitions
to 0 after the read/write is complete. Once this bit is set, it can not be cleared by software.
Note: The driver must never execute a wakeup and a read/write operation at the same time.
This bit selects between running a read or write operation to the ULPI.
0 Read
1 Write
Reserved, should be cleared.
This bit represents the state of the ULPI interface. Before reading this bit, the ULPIPORT field
should be set accordingly if used with the multi-port host. Otherwise, this field should always
remain 0.
0 Any other state (that is, carkit, serial, low power).
1 Normal Sync State.
For wakeup or read/write operations this value selects the port number to which the ULPI PHY
is attached. Valid values are 0 and 1.
When a read or write operation is commanded, the address of the operation is written to this
field.
After a read operation completes, the result is placed in this field.
When a write operation is commanded, the data to be sent is written to this field.
Table 16-21. ULPI VIEWPORT Field Descriptions
28
—
ULPISS
27
26
ULPIPORT
All zeros
All zeros
24
8
23
7
Description
ULPIDTWR
ULPIADDR
Revision History
Access: Mixed
16
A-21
0