MPC8313ZQADDC Freescale Semiconductor, MPC8313ZQADDC Datasheet - Page 370

• Manufacturer Part Number: MPC8313ZQADDC
• Description: Microprocessors - MPU 8313 REV2.2 PB NO ENC
• Manufacturer: Freescale Semiconductor

Specifications of MPC8313ZQADDC

• Processor Series: MPC8313
• Core: e300
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 133 MHz
• Program Memory Size: 16 KB
• Data Ram Size: 16 KB
• Interface Type: I2C
• Mounting Style: SMD/SMT
• Package / Case: PBGA
• Number Of Programmable I/os: 32
• Number Of Timers: 4

Integrated Programmable Interrupt Controller (IPIC)
Table 8-8
SIPNR_L is shown in
Table 8-9
and SIMSR_L.
8-12
Offset 0x0C
Reset
0–31
Bits Name
W
R
0
INT n Each implemented bit (listed in
lists implemented SIPNR_L fields. Note that these field assignments are also valid for SIFCR_L
defines the bit fields of SIPNR_H.
received, the interrupt controller sets the corresponding SIPNR bit. When a pending interrupt is handled, the
user clears the SIPNR bit by clearing the corresponding event register bit.
SIPNR bits are read only. Writing to this register has no effect.
Note that the SIPNR bit positions are not changed according to their relative priority.
For unimplemented bits, writes are ignored, read = 0.
MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2
Table 8-7. SIPNR_H/SIFCR_H/SIMSR_H Bit Assignments (continued)
Figure 8-5. System Internal Interrupt Pending Register (SIPNR_L)
Figure
Table 8-9. SIPNR_L/SIFCR_L/SIMSR_L Bit Assignments
8-4.
Bits
26
27
28
29
30
31
Table 8-8. SIPNR_H Field Descriptions
INT
n (Implemented bits are listed in
Table
Bits
0
1
2
3
4
5
6
7
8
9
8-7) corresponds to an internal interrupt source. When an interrupt is
eTSEC1 1588 timer
eTSEC2 1588 timer
All zeros
Description
Field
SEC
I2C1
I2C2
SPI
RTC SEC
RTC ALR
GTM4
GTM8
Field
DMA
SBA
PCI
PIT
MU
—
Table
8-9.)
Freescale Semiconductor
Access: Read only
31