MPC8313ZQADDC Freescale Semiconductor, MPC8313ZQADDC Datasheet - Page 564

• Manufacturer Part Number: MPC8313ZQADDC
• Description: Microprocessors - MPU 8313 REV2.2 PB NO ENC
• Manufacturer: Freescale Semiconductor

Specifications of MPC8313ZQADDC

• Processor Series: MPC8313
• Core: e300
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 133 MHz
• Program Memory Size: 16 KB
• Data Ram Size: 16 KB
• Interface Type: I2C
• Mounting Style: SMD/SMT
• Package / Case: PBGA
• Number Of Programmable I/os: 32
• Number Of Timers: 4

DMA/Messaging Unit
Table 12-2
12.3.2
OMIMR contains the interrupt mask of the doorbell and message register events generated by the local
processor. OMIMR can be read from the CSB or the PCI bus, but it can be written only from the PCI bus.
Figure 12-3
Table 12-3
12-4
Offset 0x034
Reset
31–4
31–4
Bits
Bits
3
2
1
0
3
2
W
R
31
Name
Name
ODIM
OM1I
OM0I
ODI
—
—
—
—
describes the OMISR register.
describes the OMIMR register.
Outbound Message Interrupt Mask Register (OMIMR)
shows the OMIMR.
MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2
Reserved
Outbound doorbell interrupt. This read-only bit indicates the status of the ODR bits. It is masked by
OMIMR[ODIM].
0 No outbound doorbell interrupt.
1 There is an outbound doorbell interrupt.
Reserved
Outbound message 1 interrupt. When set, indicates that there is an outbound message 1 interrupt. Write 1
to this position to clear this bit.
0 No outbound message 1 interrupt.
1 There is an outbound message 1 interrupt.
Outbound message 0 interrupt. When set, indicates that there is an outbound message 0 interrupt. Write 1
to this position to clear this bit.
0 No outbound message 0 interrupt.
1 There is an outbound message 0 interrupt.
Reserved
Outbound doorbell interrupt mask.
0 Outbound doorbell interrupt is allowed
1 Outbound doorbell interrupt is masked
Reserved
Figure 12-3. Outbound Message Interrupt Mask Register (OMIMR)
Table 12-3. OMIMR Field Descriptions
Table 12-2. OMISR Field Descriptions
—
All zeros
Description
Description
4
ODIM
3
Access: User Read/Write
Freescale Semiconductor
—
2
OM1IM OM0IM
1
0