MPC8313ZQADDC Freescale Semiconductor, MPC8313ZQADDC Datasheet - Page 509

• Manufacturer Part Number: MPC8313ZQADDC
• Description: Microprocessors - MPU 8313 REV2.2 PB NO ENC
• Manufacturer: Freescale Semiconductor

Specifications of MPC8313ZQADDC

• Processor Series: MPC8313
• Core: e300
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 133 MHz
• Program Memory Size: 16 KB
• Data Ram Size: 16 KB
• Interface Type: I2C
• Mounting Style: SMD/SMT
• Package / Case: PBGA
• Number Of Programmable I/os: 32
• Number Of Timers: 4

software. However, for commands given a specific byte count in FBCR[BC], FPAR[MS] locates the
starting address in either the main region (MS = 0) or the spare region (MS = 1). Where different eLBC
banks control both small and large-page devices, a large-page 4 Kbyte buffer must be assigned to either
the first 4 or last 4 small-page buffers.
10.4.3.1.3
The FCM’s ECC engine makes use of data in the NAND Flash spare region to store pre-computed ECC
code words. ECC is calculated in a single pass over blocks of 512 bytes of data in the main region. The
setting of FMR[ECCM] determines the location of the 24-bit ECC in the spare region.
The basic ECC algorithm is depicted in
matrix having 8 columns (corresponding with the device bus IO[7:0] or IO[15:8]) and 512 rows
(corresponding with each byte in the ECC block).
Freescale Semiconductor
Bank Base Address
Figure 10-47. FCM Buffer RAM Memory Map for Large-Page (2-Kbyte page) NAND Flash Devices
offset 0x1000
offset 0x2000
End of Bank
MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2
Error Correcting Codes and the Spare Region
block
ECC
buffer #0/page 0
buffer #1/page 1
replicated FCM
buffer RAM
images in bank
byte 510
byte 511
byte 0
byte 1
Figure 10-48. FCM ECC Calculation
bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0
bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0
bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0
bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0
Figure
10-48. The stream of data bytes is considered to form a
4 Kbyte page buffer:
2048-byte main region (FPAR[MS] = 0)
64-byte spare region (FPAR[MS] = 1)
1984-byte reserved region (FPAR[MS] = 1)
Enhanced Local Bus Controller
10-61