MPC8313ZQADDC Freescale Semiconductor, MPC8313ZQADDC Datasheet - Page 84

• Manufacturer Part Number: MPC8313ZQADDC
• Description: Microprocessors - MPU 8313 REV2.2 PB NO ENC
• Manufacturer: Freescale Semiconductor

Specifications of MPC8313ZQADDC

• Processor Series: MPC8313
• Core: e300
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 133 MHz
• Program Memory Size: 16 KB
• Data Ram Size: 16 KB
• Interface Type: I2C
• Mounting Style: SMD/SMT
• Package / Case: PBGA
• Number Of Programmable I/os: 32
• Number Of Timers: 4

Overview
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— Programmable maximum frame length supports jumbo frames (up to 9.6 Kbytes) and IEEE
— VLAN insertion and deletion
— Retransmission following a collision
— CRC generation and verification of inbound/outbound packets
— Programmable Ethernet preamble insertion and extraction of up to 7 bytes
— MAC address recognition:
— Buffer descriptors backward compatible with MPC8260 and MPC860T 10/100 Ethernet
— RMON statistics support
— 10-Kbyte internal transmit and 2-Kbyte receive FIFOs
— MII management interface for control and status
Two SGMII PHY interfaces
— Both interfaces share a single PLL
— Each interface supports a 4-wire differential (Tx, Rx) interface
— Support for auto-negotiation
PCI interface
— Designed to comply with PCI Local Bus Specification, Revision 2.3
— 32-bit PCI interface operating at up to 66 MHz
— PCI 3.3-V compatible
— Support for host and agent modes
— Memory prefetching of PCI read accesses and support for delayed read transactions
— On-chip arbitration, supporting three external PCI masters
— Selectable hardware-enforced coherency
— Support for PCI Power Management 1.2
— Support for PME generation (agent) and wake-on-PME
Universal serial bus (USB) dual-role controller
— Designed to comply with Universal Serial Bus Revision 2.0 Specification
— Supports operation as a stand-alone USB host controller
Std 802.1® virtual local area network (VLAN) tags and priority
– Per-frame VLAN control word or default VLAN for each eTSEC
– Extracted VLAN control word passed to software separately
– Exact match on primary and virtual 48-bit unicast addresses
– VRRP and HSRP support for seamless router fail-over
– Up to 16 exact-match MAC addresses supported
– Broadcast address (accept/reject)
– Hash table match on up to 512 multicast addresses
– Promiscuous mode
programming models
– Supports USB root hub with one downstream-facing port
MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2
Freescale Semiconductor