MPC8313ZQADDC Freescale Semiconductor, MPC8313ZQADDC Datasheet - Page 966

• Manufacturer Part Number: MPC8313ZQADDC
• Description: Microprocessors - MPU 8313 REV2.2 PB NO ENC
• Manufacturer: Freescale Semiconductor

Specifications of MPC8313ZQADDC

• Processor Series: MPC8313
• Core: e300
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 133 MHz
• Program Memory Size: 16 KB
• Data Ram Size: 16 KB
• Interface Type: I2C
• Mounting Style: SMD/SMT
• Package / Case: PBGA
• Number Of Programmable I/os: 32
• Number Of Timers: 4

Universal Serial Bus Interface
16.3.2.22 Endpoint Control Register 0 (ENDPTCTRL0)—Non-EHCI
This register is not defined in the EHCI specification. Every device will implement endpoint 0 as a control
endpoint.
16-38
Offset 0x2_31C0
Reset 0 0 0 0 0 0 0 0
31–24
22–20
19–18
15–8
Bits
6–4
3–2
23
17
16
7
1
0
W
R
31
Name
RXE
RXS
TXE
TXT
TXS
RXT
—
—
—
—
—
—
MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2
Reserved, should be cleared.
TX endpoint enable. Endpoint zero is always enabled.
0 Disable
1 Enable
Reserved, should be cleared.
TX endpoint type. Endpoint zero is always a control endpoint (00).
Reserved, should be cleared.
TX endpoint stall. Software can write a one to this bit to force the endpoint to return a STALL handshake to the
Host. It will continue returning STALL until the bit is cleared by software or it will automatically be cleared upon
receipt of a new SETUP request.
1 Endpoint stalled
0 Endpoint OK
Reserved, should be cleared.
RX endpoint enable. Endpoint zero is always enabled.
0 Disabled
1 Enabled
Reserved, should be cleared.
RX endpoint type. Endpoint zero is always a control endpoint (00).
Reserved, should be cleared.
RX endpoint stall
Software can write a one to this bit to force the endpoint to return a STALL handshake to the host. It will
continue returning STALL until the bit is cleared by software or it will automatically be cleared upon receipt of
a new SETUP request.
1 Endpoint stalled
0 Endpoint OK
—
24
Table 16-31. ENDPTCTRL0 Register Field Descriptions
TXE
Figure 16-28. Endpoint Control 0 (ENDPTCTRL0)
23
1
22
0
—
0
20 19
0
0
TXT
18 17
0
— TXS
0
16
0
Description
15
0 0 0 0 0 0 0 0
—
8
RXE
7
1
Freescale Semiconductor
0 0 0 0
6
—
4
3
RXT
Access: Mixed
0 0
2
— RXS
1
0
0