MPC8313ZQADDC Freescale Semiconductor, MPC8313ZQADDC Datasheet - Page 734

• Manufacturer Part Number: MPC8313ZQADDC
• Description: Microprocessors - MPU 8313 REV2.2 PB NO ENC
• Manufacturer: Freescale Semiconductor

Specifications of MPC8313ZQADDC

• Processor Series: MPC8313
• Core: e300
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 133 MHz
• Program Memory Size: 16 KB
• Data Ram Size: 16 KB
• Interface Type: I2C
• Mounting Style: SMD/SMT
• Package / Case: PBGA
• Number Of Programmable I/os: 32
• Number Of Timers: 4

Enhanced Three-Speed Ethernet Controllers
15-16
0x2_44C8–
0x2_4440–
0x2_4514–
0x2_443C RBASE7*—RxBD base address of ring 7
0x2_44BC
0x2_44C0 TMR_RXTS_H* - Rx timer timestamp register high
0x2_44C4 TMR_RXTS_L* - Rx timer timestamp register low
0x2_44FC
0x2_450C HAFDUP—Half-duplex control
0x2_451C
0x2_452C MIIMCON—MII management control
0x2_453C IFSTAT—Interface status
0x2_4430 Reserved
0x2_4434 RBASE6*—RxBD base address of ring 6
0x2_4438 Reserved
0x2_4500 MACCFG1—MAC configuration register 1
0x2_4504 MACCFG2—MAC configuration register 2
0x2_4508 IPGIFG—Inter-packet/inter-frame gap register
0x2_4510 MAXFRM—Maximum frame length
0x2_4520 MIIMCFG—MII management configuration
0x2_4524 MIIMCOM—MII management command
0x2_4528 MIIMADD—MII management address
0x2_4530 MIIMSTAT—MII management status
0x2_4534 MIIMIND—MII management indicator
0x2_4538 Reserved
0x2_4540 MACSTNADDR1—MAC station address register 1
0x2_4544 MACSTNADDR2—MAC station address register 2
eTSEC1
Offset
Reserved
Reserved
Reserved
MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2
Table 15-4. Module Memory Map (continued)
Name
1
eTSEC MAC Registers
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
WO
—
—
—
—
—
—
R
R
R
2
0x00A1_F037
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_7000
0x4060_5060
0x0000_0600
0x0000_0007
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
Reset
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