MPC555LFMZP40 Freescale Semiconductor, MPC555LFMZP40 Datasheet - Page 203

IC MCU 32BIT 40MHZ 272-BGA

MPC555LFMZP40

Manufacturer Part Number
MPC555LFMZP40
Description
IC MCU 32BIT 40MHZ 272-BGA
Manufacturer
Freescale Semiconductor
Series
MPC5xxr
Datasheets

Specifications of MPC555LFMZP40

Core Processor
PowerPC
Core Size
32-Bit
Speed
40MHz
Connectivity
CAN, EBI/EMI, SCI, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
101
Program Memory Size
448KB (448K x 8)
Program Memory Type
FLASH
Ram Size
26K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 2.7 V
Data Converters
A/D 32x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
272-PBGA
Controller Family/series
POWER 5xx
Ram Memory Size
26KB
Cpu Speed
63MIPS
Embedded Interface Type
QSPI, SCI, TouCAN
Operating Temperature Range
-40°C To +125°C
No. Of Pins
272
Rohs Compliant
No
Processor Series
MPC5xx
Core
PowerPC
Data Bus Width
32 bit
Data Ram Size
26 KB
Interface Type
CAN, QSPI, SCI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
101
Operating Supply Voltage
3.3 V to 5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Development Tools By Supplier
MPC555CMEE
Minimum Operating Temperature
- 85 C
On-chip Adc
10 bit, 32 Channel
Cpu Family
MPC55xx
Device Core
PowerPC
Device Core Size
32b
Frequency (max)
40MHz
Total Internal Ram Size
32KB
# I/os (max)
101
Operating Supply Voltage (typ)
5V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
272
Package Type
BGA
For Use With
MPC555CMEE - KIT EVAL FOR MPC555
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Lead Free Status / Rohs Status
No

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5.1 Module Overview
MPC555 / MPC556
USER’S MANUAL
The unified system interface unit (USIU) of the MPC555 / MPC556 controls system
start-up, system initialization and operation, system protection, and the external sys-
tem bus. The MPC555 / MPC556 USIU functions include the following:
The system configuration and protection function controls the overall system configu-
ration and provides various monitors and timers, including the bus monitor, software
watchdog timer, periodic interrupt timer, PowerPC decrementer, time base, and real
time clock. The interrupt controller and USIU are also included in the system configu-
ration and protection function. Refer to
PROTECTION
The reset controller receives input from a number of reset sources and takes appro-
priate actions, depending on the source. The reset status register (RSR) reflects the
most recent source to cause a reset. Refer to
The clock synthesizer generates the clock signals used by the SIU as well as the other
modules and external devices. This circuitry can generate the system clock from a 4-
MHz or 20-MHz crystal.
The SIU supports various low-power modes. Each supplies a different range of power
consumption, functionality and wake-up time. Clock generation and low-power modes
are described in
The external bus interface (EBI) handles the transfer of information between the inter-
nal busses and the memory or peripherals in the external address space. The
MPC555 / MPC556 is designed to allow external bus masters to request and obtain
mastership of the system bus, and if required access the on-chip memory and regis-
ters.
The memory controller module provides a glueless interface to many types of memory
devices and peripherals. It supports up to four memory banks, each with its own device
• System configuration and protection
• Interrupt controller
• System reset monitoring and generation
• Clock synthesizer
• Power management
• External bus interface (EBI) control
• Memory controller
• Debug support
SECTION 9 EXTERNAL BUS INTERFACE
for details.
SECTION 8 CLOCKS AND POWER
UNIFIED SYSTEM INTERFACE UNIT
Freescale Semiconductor, Inc.
For More Information On This Product,
UNIFIED SYSTEM INTERFACE UNIT
Go to: www.freescale.com
Rev. 15 October 2000
SECTION 5
SECTION 6 SYSTEM CONFIGURATION AND
SECTION 7 RESET
describes the bus operation.
CONTROL.
for details.
MOTOROLA
5-1

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