MPC555LFMZP40 Freescale Semiconductor, MPC555LFMZP40 Datasheet - Page 291

• Manufacturer Part Number: MPC555LFMZP40
• Description: IC MCU 32BIT 40MHZ 272-BGA
• Manufacturer: Freescale Semiconductor
• Series: MPC5xxr

Specifications of MPC555LFMZP40

• Core Processor: PowerPC
• Core Size: 32-Bit
• Speed: 40MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 101
• Program Memory Size: 448KB (448K x 8)
• Program Memory Type: FLASH
• Ram Size: 26K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 2.7 V
• Data Converters: A/D 32x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 272-PBGA
• Controller Family/series: POWER 5xx
• Ram Memory Size: 26KB
• Cpu Speed: 63MIPS
• Embedded Interface Type: QSPI, SCI, TouCAN
• Operating Temperature Range: -40°C To +125°C
• No. Of Pins: 272
• Rohs Compliant: No
• Processor Series: MPC5xx
• Core: PowerPC
• Data Bus Width: 32 bit
• Data Ram Size: 26 KB
• Interface Type: CAN, QSPI, SCI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 101
• Operating Supply Voltage: 3.3 V to 5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: MPC555CMEE
• Minimum Operating Temperature: - 85 C
• On-chip Adc: 10 bit, 32 Channel
• Cpu Family: MPC55xx
• Device Core: PowerPC
• Device Core Size: 32b
• Frequency (max): 40MHz
• Total Internal Ram Size: 32KB
• # I/os (max): 101
• Operating Supply Voltage (typ): 5V
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 272
• Package Type: BGA
• For Use With: MPC555CMEE - KIT EVAL FOR MPC555
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No

8.12.2 PLL, Low-Power, and Reset-Control Register (PLPRCR)
MPC555
USER’S MANUAL
Bit(s)
25:27
29:31
24
28
The PLL, low-power, and reset-control register (PLPRCR) is a 32-bit register powered
by the keep alive power supply.
/
MPC556
Name
DFNH
DFNL
—
—
Table 8-9 SCCR Bit Descriptions (Continued)
Reserved
Division factor low frequency. The user can load these bits with the desired divide value and
the CSRC bit to change the frequency. Changing the value of these bits does not result in a
loss of lock condition. These bits are cleared by power-on or hard reset. Refer to
eral System Clocks
000 = Divide by 2
001 = Divide by 4
010 = Divide by 8
011 = Divide by 16
100 = Divide by 32
101 = Divide by 64
110 = Reserved
111 = Divide by 256
Reserved
Division factor high frequency. These bits determine the general system clock frequency dur-
ing normal mode. Changing the value of these bits does not result in a loss of lock condition.
These bits are cleared by power-on or hard reset. The user can load these bits at any time
to change the general system clock rate. Note that the GCLKs generated by this division fac-
tor are not 50% duty cycle (i.e. CLKOUT).
000 = Divide by 1
001 = Divide by 2
010 = Divide by 4
011 = Divide by 8
100 = Divide by 16
101 = Divide by 32
110 = Divide by 64
111 = Reserved
Freescale Semiconductor, Inc.
For More Information On This Product,
CLOCKS AND POWER CONTROL
Go to: www.freescale.com
Rev. 15 October 2000
and
Figure 8-5
for details on using these bits.
Description
MOTOROLA
8.6.1 Gen-
8-31