MPC555LFMZP40 Freescale Semiconductor, MPC555LFMZP40 Datasheet - Page 657

• Manufacturer Part Number: MPC555LFMZP40
• Description: IC MCU 32BIT 40MHZ 272-BGA
• Manufacturer: Freescale Semiconductor
• Series: MPC5xxr

Specifications of MPC555LFMZP40

• Core Processor: PowerPC
• Core Size: 32-Bit
• Speed: 40MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 101
• Program Memory Size: 448KB (448K x 8)
• Program Memory Type: FLASH
• Ram Size: 26K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 2.7 V
• Data Converters: A/D 32x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 272-PBGA
• Controller Family/series: POWER 5xx
• Ram Memory Size: 26KB
• Cpu Speed: 63MIPS
• Embedded Interface Type: QSPI, SCI, TouCAN
• Operating Temperature Range: -40°C To +125°C
• No. Of Pins: 272
• Rohs Compliant: No
• Processor Series: MPC5xx
• Core: PowerPC
• Data Bus Width: 32 bit
• Data Ram Size: 26 KB
• Interface Type: CAN, QSPI, SCI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 101
• Operating Supply Voltage: 3.3 V to 5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: MPC555CMEE
• Minimum Operating Temperature: - 85 C
• On-chip Adc: 10 bit, 32 Channel
• Cpu Family: MPC55xx
• Device Core: PowerPC
• Device Core Size: 32b
• Frequency (max): 40MHz
• Total Internal Ram Size: 32KB
• # I/os (max): 101
• Operating Supply Voltage (typ): 5V
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 272
• Package Type: BGA
• For Use With: MPC555CMEE - KIT EVAL FOR MPC555
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No

CMFMCR — CMF EEPROM Configuration Register
19.2.1.1 CMF EEPROM Configuration Register (CMFMCR)
MPC555
USER’S MANUAL
LOCK
MSB
0
1
16
RESET:
0
RESET:
Table 19-1
The address offset is from the start of the control register block for each CMF module.
(See
The CMF EEPROM module configuration register is used to control the operation of
the CMF EEPROM array and BIU. Two bits (the Censor bits) of the CMFMCR bits are
special FLASH NVM registers. The factory default state of the Censor bits is either
0b01 or 0b10.
1. The reset state of bits 6:7 are defined by special FLASH NVM registers. The factory default state is either 0b01
or 0b10.
1
0
0
17
/
0
Figure
0x2F C80C — 0x2F C81C
0x2F C84C — 0x2F C85C
MPC556
0x00 0000 – 0x03 FFFF
0x04 0000 – 0x06 FFFF
2
0
0
18
0
0x2F C800
0x2F C840
0x2F C804
0x2F C844
0x2F C808
0x2F C848
is a programming model for each set of CMF EEPROM control registers.
Address
19-1.)
FIC
3
0
19
DATA[0:7]
0
Table 19-1 CMF Register Programmer’s Model
Control Registers (Located in Supervisor Data Space)
Freescale Semiconductor, Inc.
SIE
4
0
20
0
For More Information On This Product,
CESS
AC-
21
5
0
0
CDR MoneT FLASH EEPROM
Go to: www.freescale.com
Rev. 15 October 2000
22
0
CENSOR
6
CMF Flash Array
CMF Module Configuration Register (CMFMCR)
See
CMF EEPROM Test Register (CMFTST)
See
High Voltage Control Register (CMFCTL)
See
Reserved
CMF_A RAM Array
CMF_B RAM Array
MSB
0
23
0
7
Table 19-2
Table 19-3
Table 19-6
1
24
1
8
1
for bit descriptions.
for bit descriptions.
for bit descriptions.
25
1
9
1
26
1
10
1
Register
PROTECT[0:7]
27
1
11
SUPV[0:7]
1
28
1
12
1
29
1
13
1
0x2F C800
0x2F C840
MOTOROLA
30
1
14
1
LSB
LSB
31
19-5
31
1
15
1