MPC555LFMZP40 Freescale Semiconductor, MPC555LFMZP40 Datasheet - Page 513

IC MCU 32BIT 40MHZ 272-BGA

MPC555LFMZP40

Manufacturer Part Number
MPC555LFMZP40
Description
IC MCU 32BIT 40MHZ 272-BGA
Manufacturer
Freescale Semiconductor
Series
MPC5xxr
Datasheets

Specifications of MPC555LFMZP40

Core Processor
PowerPC
Core Size
32-Bit
Speed
40MHz
Connectivity
CAN, EBI/EMI, SCI, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
101
Program Memory Size
448KB (448K x 8)
Program Memory Type
FLASH
Ram Size
26K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 2.7 V
Data Converters
A/D 32x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
272-PBGA
Controller Family/series
POWER 5xx
Ram Memory Size
26KB
Cpu Speed
63MIPS
Embedded Interface Type
QSPI, SCI, TouCAN
Operating Temperature Range
-40°C To +125°C
No. Of Pins
272
Rohs Compliant
No
Processor Series
MPC5xx
Core
PowerPC
Data Bus Width
32 bit
Data Ram Size
26 KB
Interface Type
CAN, QSPI, SCI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
101
Operating Supply Voltage
3.3 V to 5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Development Tools By Supplier
MPC555CMEE
Minimum Operating Temperature
- 85 C
On-chip Adc
10 bit, 32 Channel
Cpu Family
MPC55xx
Device Core
PowerPC
Device Core Size
32b
Frequency (max)
40MHz
Total Internal Ram Size
32KB
# I/os (max)
101
Operating Supply Voltage (typ)
5V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
272
Package Type
BGA
For Use With
MPC555CMEE - KIT EVAL FOR MPC555
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Lead Free Status / Rohs Status
No

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Part Number
Manufacturer
Quantity
Price
Part Number:
MPC555LFMZP40
Manufacturer:
MOTOLOLA
Quantity:
853
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Manufacturer:
Freescale Semiconductor
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10 000
Part Number:
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Manufacturer:
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Part Number:
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Manufacturer:
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14.8.7.2 Serial Formats
14.8.7.3 Baud Clock
MPC555
USER’S MANUAL
All data frames must have a start bit and at least one stop bit. Receiving and transmit-
ting devices must use the same data frame format. The SCI provides hardware sup-
port for both 10-bit and 11-bit frames. The M bit in SCCxR1 specifies the number of
bits per frame.
The most common data frame format for NRZ (non-return to zero) serial interfaces is
one start bit, eight data bits (LSB first), and one stop bit (ten bits total). The most com-
mon 11-bit data frame contains one start bit, eight data bits, a parity or control bit, and
one stop bit. Ten-bit and 11-bit frames are shown in
The SCI baud rate is programmed by writing a 13-bit value to the SCxBR field in SCI
control register zero (SCCxR0). The baud rate is derived from the MCU IMB clock by
a modulus counter. Writing a value of zero to SCxBR[12:0] disables the baud rate gen-
erator. The baud rate is calculated as follows:
where SCxBR is in the range {1, 2, 3, ..., 8191}.
• Break frame — A frame that consists of consecutive zeros. A break frame has no
/
stop bits.
MPC556
Start
Start
1
1
1
1
1
Freescale Semiconductor, Inc.
QUEUED SERIAL MULTI-CHANNEL MODULE
For More Information On This Product,
Table 14-28 Serial Frame Formats
Go to: www.freescale.com
SCxBR
Rev. 15 October 2000
Data
Data
SCI Baud Rate
7
7
8
7
8
10-bit Frames
11-bit Frames
=
------------------------------------------------------ -
32
×
Parity/Control
Parity/Control
SCI Baud Rate Desired
or
=
f SYS
------------------------ -
32
1
1
1
f SYS
×
SCxBR
Table
14-28.
Stop
Stop
2
1
1
2
1
MOTOROLA
14-51

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