MPC555LFMZP40 Freescale Semiconductor, MPC555LFMZP40 Datasheet - Page 76

IC MCU 32BIT 40MHZ 272-BGA

MPC555LFMZP40

Manufacturer Part Number
MPC555LFMZP40
Description
IC MCU 32BIT 40MHZ 272-BGA
Manufacturer
Freescale Semiconductor
Series
MPC5xxr
Datasheets

Specifications of MPC555LFMZP40

Core Processor
PowerPC
Core Size
32-Bit
Speed
40MHz
Connectivity
CAN, EBI/EMI, SCI, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
101
Program Memory Size
448KB (448K x 8)
Program Memory Type
FLASH
Ram Size
26K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 2.7 V
Data Converters
A/D 32x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
272-PBGA
Controller Family/series
POWER 5xx
Ram Memory Size
26KB
Cpu Speed
63MIPS
Embedded Interface Type
QSPI, SCI, TouCAN
Operating Temperature Range
-40°C To +125°C
No. Of Pins
272
Rohs Compliant
No
Processor Series
MPC5xx
Core
PowerPC
Data Bus Width
32 bit
Data Ram Size
26 KB
Interface Type
CAN, QSPI, SCI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
101
Operating Supply Voltage
3.3 V to 5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Development Tools By Supplier
MPC555CMEE
Minimum Operating Temperature
- 85 C
On-chip Adc
10 bit, 32 Channel
Cpu Family
MPC55xx
Device Core
PowerPC
Device Core Size
32b
Frequency (max)
40MHz
Total Internal Ram Size
32KB
# I/os (max)
101
Operating Supply Voltage (typ)
5V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
272
Package Type
BGA
For Use With
MPC555CMEE - KIT EVAL FOR MPC555
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Lead Free Status / Rohs Status
No

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2.3.1.26 SGPIOC[7]/IRQOUT/LWP[0]
2.3.1.27 BG/VF[0]/LWP[1]
2.3.1.28 BR/VF[1]/IWP[2]
2.3.1.29 BB/VF[2]/IWP[3]
MPC555
USER’S MANUAL
SGPIO – This function allows the pins to be used as general purpose inputs/outputs.
Freeze – Indicates that the RCPU is in debug mode.
Program Trace – Indicates an instruction fetch is taking place in order to allow pro-
gram flow tracking.
Pin Name: sgpioc7_irqout_b_lwp0
SGPIO – This function allows the pins to be used as general purpose inputs/outputs.
Interrupt Out – Indicates that an interrupt has been requested to all external devices.
Load/Store Watchpoint 0 – This output line reports the detection of a data watchpoint
in the program flow executed by the RCPU. See
PORT
Pin Name: bg_b_vf0_lwp1
Bus Grant – Indicates external data bus status. Is asserted low when the arbiter of the
external bus grants to the specific master the ownership of the bus.
Visible Instruction Queue Flush Status – This output line together with VF1 and VF2
is output by the chip when a program instructions flow tracking is required by the user.
VF report the number of instructions flushed from the instruction queue in the internal
core. See
Load/Store Watchpoint – This output line reports the detection of a data watchpoint
in the program flow executed by the RCPU.
Pin Name: br_b_vf1_iwp2
Bus Request – Indicates that the data bus has been requested for external cycle.
Visible Instruction Queue Flush Status – This output line together with VF1 and VF2
is output by the chip when a program instructions flow tracking is required by the user.
VF report the number of instructions flushed from the instruction queue in the internal
core. See
Instruction Watchpoint 2 – This output line reports the detection of an instruction
watchpoint in the program flow executed by the RCPU.
Pin Name: bb_b_vf2_iwp3
/
MPC556
for more details.
SECTION 21 DEVELOPMENT SUPPORT
SECTION 21 DEVELOPMENT SUPPORT
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
SIGNAL DESCRIPTIONS
Rev. 15 October 2000
SECTION 21 DEVELOPMENT SUP-
for more details.
for more details.
MOTOROLA
2-18

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