MPC555LFMZP40 Freescale Semiconductor, MPC555LFMZP40 Datasheet - Page 542

• Manufacturer Part Number: MPC555LFMZP40
• Description: IC MCU 32BIT 40MHZ 272-BGA
• Manufacturer: Freescale Semiconductor
• Series: MPC5xxr

Specifications of MPC555LFMZP40

• Core Processor: PowerPC
• Core Size: 32-Bit
• Speed: 40MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 101
• Program Memory Size: 448KB (448K x 8)
• Program Memory Type: FLASH
• Ram Size: 26K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 2.7 V
• Data Converters: A/D 32x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 272-PBGA
• Controller Family/series: POWER 5xx
• Ram Memory Size: 26KB
• Cpu Speed: 63MIPS
• Embedded Interface Type: QSPI, SCI, TouCAN
• Operating Temperature Range: -40°C To +125°C
• No. Of Pins: 272
• Rohs Compliant: No
• Processor Series: MPC5xx
• Core: PowerPC
• Data Bus Width: 32 bit
• Data Ram Size: 26 KB
• Interface Type: CAN, QSPI, SCI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 101
• Operating Supply Voltage: 3.3 V to 5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: MPC555CMEE
• Minimum Operating Temperature: - 85 C
• On-chip Adc: 10 bit, 32 Channel
• Cpu Family: MPC55xx
• Device Core: PowerPC
• Device Core Size: 32b
• Frequency (max): 40MHz
• Total Internal Ram Size: 32KB
• # I/os (max): 101
• Operating Supply Voltage (typ): 5V
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 272
• Package Type: BGA
• For Use With: MPC555CMEE - KIT EVAL FOR MPC555
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No

15.5 MIOS1 Bus System
15.5.1 Read/Write and Control Bus
15.5.2 Request Bus
15.5.3 Counter Bus Set
15.6 MIOS1 Programmer’s Model
MPC555
USER’S MANUAL
The internal bus system within the MIOS1 is called the modular I/O bus (MIOB). The
MIOB makes communications possible between any submodule and the IMB3 bus
master through the MBISM.
The MIOB is divided into three dedicated buses:
The read/write and control bus (RWCB) allows read and write data transfers to and
from any I/O submodule through the MBISM. It includes signals for data and address-
es as well as control signals. The control signals allow 16-bit simple synchronous sin-
gle master accesses and supports fast or slow master accesses.
The request bus (RQB) provides interrupt request signals along with I/O submodule
identification and priority information to the MBISM.
Note that some submodules do not generate interrupts and are therefore independent
of the RQB.
The 16-bit counter bus set (CBS) is a set of two 16-bit counter buses. The CBS makes
it possible to transfer information between submodules. Typically, counter submod-
ules drive the CBS, while action submodules process the data on these buses. Note,
however, that some submodules are self-contained and therefore independent of the
counter bus set.
The address space of the MIOS1 consist of four Kbytes starting at the base address
of the module. The MIOS1 base address is a multiple of the addressable range. The
overall address map organization is shown in
To find the base address of a given implementation, refer to
Address
• The read/write and control bus
• The request bus
• The counter bus set
/
MPC556
Map. To find the submodule base address, refer to
MODULAR INPUT/OUTPUT SUBSYSTEM (MIOS1)
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
Rev. 15 October 2000
Figure
15-2.
Table
1.3 MPC555 / MPC556
15-36.
MOTOROLA
15-6