MPC555LFMZP40 Freescale Semiconductor, MPC555LFMZP40 Datasheet - Page 746

• Manufacturer Part Number: MPC555LFMZP40
• Description: IC MCU 32BIT 40MHZ 272-BGA
• Manufacturer: Freescale Semiconductor
• Series: MPC5xxr

Specifications of MPC555LFMZP40

• Core Processor: PowerPC
• Core Size: 32-Bit
• Speed: 40MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 101
• Program Memory Size: 448KB (448K x 8)
• Program Memory Type: FLASH
• Ram Size: 26K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 2.7 V
• Data Converters: A/D 32x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 272-PBGA
• Controller Family/series: POWER 5xx
• Ram Memory Size: 26KB
• Cpu Speed: 63MIPS
• Embedded Interface Type: QSPI, SCI, TouCAN
• Operating Temperature Range: -40°C To +125°C
• No. Of Pins: 272
• Rohs Compliant: No
• Processor Series: MPC5xx
• Core: PowerPC
• Data Bus Width: 32 bit
• Data Ram Size: 26 KB
• Interface Type: CAN, QSPI, SCI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 101
• Operating Supply Voltage: 3.3 V to 5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: MPC555CMEE
• Minimum Operating Temperature: - 85 C
• On-chip Adc: 10 bit, 32 Channel
• Cpu Family: MPC55xx
• Device Core: PowerPC
• Device Core Size: 32b
• Frequency (max): 40MHz
• Total Internal Ram Size: 32KB
• # I/os (max): 101
• Operating Supply Voltage (typ): 5V
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 272
• Package Type: BGA
• For Use With: MPC555CMEE - KIT EVAL FOR MPC555
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No

LCTRL2 — L-Bus Support Control Register 2
LW0EN
21.7.8 L-Bus Support Control Register 2
MPC555
USER’S MANUAL
LADC
LW1
16
0
0
0
12:13
14:15
16:17
18:19
22:25
26:29
30:31
RESET:
RESET:
Bits
9:11
0:2
3:5
6:8
LCTRL1 is cleared following reset.
20
21
17
0
/
1
0
LW1LD
LW0IA
MPC556
Mnemonic
18
0
CGBMSK
CHBMSK
2
0
CRWE
CRWF
SUSG
SUSH
CSG
CTG
CTH
CSH
CTE
CTF
—
LDDC
LW1
IADC
LW0
19
0
3
0
NOMSK
Freescale Semiconductor, Inc.
BRK
20
Table 21-23 LCTRL1 Bit Descriptions
4
0
0
Compare type, comparator E
Compare type, comparator F
Compare type, comparator G
Compare type, comparator H
Select match on read/write of com-
parator E
Select match on read/write of com-
parator F
Compare size, comparator G
Compare size, comparator H
Signed/unsigned operating mode
for comparator G
Signed/unsigned operating mode
for comparator H
Byte mask for 1st L-data compara-
tor
Byte mask for 2nd L-data compara-
tor
Reserved
For More Information On This Product,
LW0LA
5
0
21
0
DEVELOPMENT SUPPORT
Go to: www.freescale.com
Description
LADC
LW0
Rev. 15 October 2000
6
0
22
0
7
0
23
0
LW0LD
RESERVED
8
0
24
0
LDDC
LW0
9
0
25
0
0xx = not active (reset value)
100 = equal
101 = less than
110 = greater than
111 = not equal
0X = don’t care (reset value)
10 = match on read
11 = match on write
01 = word
10 = half word
11 = byte
(Must be programmed to word for floating point
0 = unsigned
1 = signed
(Must be programmed to signed for floating
0000 = all bytes are not masked
0001 = the last byte of the word is masked
.
.
.
1111 = all bytes are masked
—
00 = reserved
LW1EN
compares)
point compares)
10
26
0
0
27
0
11
0
LW1IA
Function
DLW0
EN
28
0
12
0
DLW1
IADC
LW1
EN
29
0
13
0
SPR 157
MOTOROLA
SLW0
EN
30
0
14
0
LW1LA
21-50
SLW1
EN
31
0
15
0