MPC555LFMZP40 Freescale Semiconductor, MPC555LFMZP40 Datasheet - Page 792

IC MCU 32BIT 40MHZ 272-BGA

MPC555LFMZP40

Manufacturer Part Number
MPC555LFMZP40
Description
IC MCU 32BIT 40MHZ 272-BGA
Manufacturer
Freescale Semiconductor
Series
MPC5xxr
Datasheets

Specifications of MPC555LFMZP40

Core Processor
PowerPC
Core Size
32-Bit
Speed
40MHz
Connectivity
CAN, EBI/EMI, SCI, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
101
Program Memory Size
448KB (448K x 8)
Program Memory Type
FLASH
Ram Size
26K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 2.7 V
Data Converters
A/D 32x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
272-PBGA
Controller Family/series
POWER 5xx
Ram Memory Size
26KB
Cpu Speed
63MIPS
Embedded Interface Type
QSPI, SCI, TouCAN
Operating Temperature Range
-40°C To +125°C
No. Of Pins
272
Rohs Compliant
No
Processor Series
MPC5xx
Core
PowerPC
Data Bus Width
32 bit
Data Ram Size
26 KB
Interface Type
CAN, QSPI, SCI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
101
Operating Supply Voltage
3.3 V to 5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Development Tools By Supplier
MPC555CMEE
Minimum Operating Temperature
- 85 C
On-chip Adc
10 bit, 32 Channel
Cpu Family
MPC55xx
Device Core
PowerPC
Device Core Size
32b
Frequency (max)
40MHz
Total Internal Ram Size
32KB
# I/os (max)
101
Operating Supply Voltage (typ)
5V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
272
Package Type
BGA
For Use With
MPC555CMEE - KIT EVAL FOR MPC555
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Lead Free Status / Rohs Status
No

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MPC555 / MPC556
USER’S MANUAL
0x30 5140 –
0x30 517F
0x30 5180 –
0x30 51BF
0x30 51C0 –
0x30 51DF
MPWMSM0 (MIOS Pulse Width Modulation Submodule 0)
0x30 6000
0x30 6002
0x30 6004
0x30 6006
MPWMSM1 (MIOS Pulse Width Modulation Submodule 1)
0x30 6008
0x30 600A
0x30 600C
0x30 600E
MPWMSM2 (MIOS Pulse Width Modulation Submodule 2)
0x30 6010
0x30 6012
0x30 6014
0x30 6016
MPWMSM3 (MIOS Pulse Width Modulation Submodule 3)
0x30 6018
0x30 601A
0x30 601C
NOTES:
Address
Address
1. Bits 0–3 writeable only in test mode, otherwise read only.
2. Bits 3–11 writeable only in test mode, otherwise read only.
Table A-9 QSMCM (Queued Serial Multi-Channel Module) (Continued)
Access
Access
S/U
S/U
S/U
S/U
S/U
S/U
S/U
S/U
S/U
S/U
S/U
S/U
S/U
S/U
S/U
S/U
S/U
S/U
Table A-10 MIOS1 (Modular Input/Output Subsystem)
RECRAM
TRAN.RAM
COMD.RAM
MPWMSMPERR
MPWMSMPULR
MPWMSMCNTR
MPWMSMSCR
MPWMSMPERR
MPWMSMPULR
MPWMSMCNTR
MPWMSMSCR
MPWMSMPERR
MPWMSMPULR
MPWMSMCNTR
MPWMSMSCR
MPWMSMPERR
MPWMSMPULR
MPWMSMCNTR
Freescale Semiconductor, Inc.
MPC555 / MPC556 INTERNAL MEMORY MAP
For More Information On This Product,
Symbol
Symbol
Go to: www.freescale.com
Rev. 15 October 2000
Receive Data RAM
Transmit Data RAM
Command RAM
MPWMSM0 Period Register.
See
MPWMSM0 Pulse Register.
See
MPWMSM0 Count Register.
See
MPWMSM0 Status/Control Register.
See
MPWMSM1 Period Register.
See
MPWMSM1 Pulse Register.
See
MPWMSM1 Count Register.
See
MPWMSM1 Status/Control Register.
See
MPWMSM2 Period Register.
See
MPWMSM2 Pulse Register.
See
MPWMSM2 Count Register.
See
MPWMSM2 Status/Control Register.
See
MPWMSM3 Period Register.
See
MPWMSM3 Pulse Register.
See
MPWMSM3 Count Register.
See
Table 15-20
Table 15-21
Table 15-22
Table 15-23
Table 15-20
Table 15-21
Table 15-22
Table 15-23
Table 15-20
Table 15-21
Table 15-22
Table 15-23
Table 15-20
Table 15-21
Table 15-22
for bit descriptions.
for bit descriptions.
for bit descriptions.
for bit descriptions.
for bit descriptions.
for bit descriptions.
for bit descriptions.
for bit descriptions.
for bit descriptions.
for bit descriptions.
for bit descriptions.
for bit descriptions.
for bit descriptions.
for bit descriptions.
for bit descriptions.
Register
Register
Size
Size
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
MOTOROLA
Reset
Reset
S
S
S
X
X
X
S
X
X
X
S
X
X
X
S
X
X
X
A-16

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