MPC555LFMZP40 Freescale Semiconductor, MPC555LFMZP40 Datasheet - Page 77

• Manufacturer Part Number: MPC555LFMZP40
• Description: IC MCU 32BIT 40MHZ 272-BGA
• Manufacturer: Freescale Semiconductor
• Series: MPC5xxr

Specifications of MPC555LFMZP40

• Core Processor: PowerPC
• Core Size: 32-Bit
• Speed: 40MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 101
• Program Memory Size: 448KB (448K x 8)
• Program Memory Type: FLASH
• Ram Size: 26K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 2.7 V
• Data Converters: A/D 32x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 272-PBGA
• Controller Family/series: POWER 5xx
• Ram Memory Size: 26KB
• Cpu Speed: 63MIPS
• Embedded Interface Type: QSPI, SCI, TouCAN
• Operating Temperature Range: -40°C To +125°C
• No. Of Pins: 272
• Rohs Compliant: No
• Processor Series: MPC5xx
• Core: PowerPC
• Data Bus Width: 32 bit
• Data Ram Size: 26 KB
• Interface Type: CAN, QSPI, SCI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 101
• Operating Supply Voltage: 3.3 V to 5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: MPC555CMEE
• Minimum Operating Temperature: - 85 C
• On-chip Adc: 10 bit, 32 Channel
• Cpu Family: MPC55xx
• Device Core: PowerPC
• Device Core Size: 32b
• Frequency (max): 40MHz
• Total Internal Ram Size: 32KB
• # I/os (max): 101
• Operating Supply Voltage (typ): 5V
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 272
• Package Type: BGA
• For Use With: MPC555CMEE - KIT EVAL FOR MPC555
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No

2.3.1.30 IWP[0:1]/VFLS[0:1]
2.3.1.31 TMS
2.3.1.32 TDI/DSDI
2.3.1.33 TCK/DSCK
2.3.1.34 TDO/DSDO
MPC555
USER’S MANUAL
Bus Busy – Indicates that the master is using the bus. This pin is an active negate
signal and may need an external pull-up resistor to ensure proper operation and signal
timing specifications.
Visible Instruction Queue Flush Status – This output line together with VF0 and VF1
is output by the chip when a program instructions flow tracking is required by the user.
VF report the number of instructions flushed from the instruction queue in the internal
core.
Instruction Watchpoint 3 – This output line reports the detection of an instruction
watchpoint in the program flow executed by the internal core.
Pin Name: iwp0_vfls0 - iwp1_vfls1 (2 pins)
Instruction Watchpoint – These output lines report the detection of an instruction
watchpoint in the program flow executed by the RCPU.
Visible History Buffer Flush Status – These signals are output by the chip to enable
program instruction flow tracking. They report the number of instructions flushed from
the history buffer in the RCPU. See
tails.
Pin Name: tms
Test Mode Select – This input controls test mode operations for on-board test logic
(JTAG).
Pin Name: tdi_dsdi
Test Data In – This input is used for serial test instructions and test data for on-board
test logic (JTAG).
Development Serial Data Input – This input line is the data in for the debug port in-
terface. See
Pin Name: tck_dsck
Test Clock – This input provides a clock for on-board test logic (JTAG).
Development Serial Clock – This input line is the clock for the debug port interface.
See
Pin Name: tdo_dsdo
SECTION 21 DEVELOPMENT SUPPORT
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MPC556
SECTION 21 DEVELOPMENT SUPPORT
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
SIGNAL DESCRIPTIONS
Rev. 15 October 2000
SECTION 21 DEVELOPMENT SUPPORT
for details.
for details.
MOTOROLA
for de-
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