MPC555LFMZP40 Freescale Semiconductor, MPC555LFMZP40 Datasheet - Page 619

• Manufacturer Part Number: MPC555LFMZP40
• Description: IC MCU 32BIT 40MHZ 272-BGA
• Manufacturer: Freescale Semiconductor
• Series: MPC5xxr

Specifications of MPC555LFMZP40

• Core Processor: PowerPC
• Core Size: 32-Bit
• Speed: 40MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 101
• Program Memory Size: 448KB (448K x 8)
• Program Memory Type: FLASH
• Ram Size: 26K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 2.7 V
• Data Converters: A/D 32x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 272-PBGA
• Controller Family/series: POWER 5xx
• Ram Memory Size: 26KB
• Cpu Speed: 63MIPS
• Embedded Interface Type: QSPI, SCI, TouCAN
• Operating Temperature Range: -40°C To +125°C
• No. Of Pins: 272
• Rohs Compliant: No
• Processor Series: MPC5xx
• Core: PowerPC
• Data Bus Width: 32 bit
• Data Ram Size: 26 KB
• Interface Type: CAN, QSPI, SCI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 101
• Operating Supply Voltage: 3.3 V to 5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: MPC555CMEE
• Minimum Operating Temperature: - 85 C
• On-chip Adc: 10 bit, 32 Channel
• Cpu Family: MPC55xx
• Device Core: PowerPC
• Device Core Size: 32b
• Frequency (max): 40MHz
• Total Internal Ram Size: 32KB
• # I/os (max): 101
• Operating Supply Voltage (typ): 5V
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 272
• Package Type: BGA
• For Use With: MPC555CMEE - KIT EVAL FOR MPC555
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No

17.1 Overview
MPC555 / MPC556
USER’S MANUAL
The time processor unit 3 (TPU3), an enhanced version of the original TPU, is an in-
telligent, semi-autonomous microcontroller designed for timing control. The TPU3 is
fully compatible to the TPU2. Operating simultaneously with the CPU, the two TPU3
modules process micro-instructions, schedules and processes real-time hardware
events, performs input and output, and accesses shared data without CPU interven-
tion. Consequently, for each timer event, the CPU setup and service times are mini-
mized or eliminated.
The MPC555 / MPC556 contains two independent TPU3s.
block diagram of a single TPU3.
The TPU3 can be viewed as a special-purpose microcomputer that performs a pro-
grammable series of two operations, match and capture. Each occurrence of either op-
eration is called an event. A programmed series of events is called a function. TPU
functions replace software functions that would require CPU interrupt service.
CONFIGURATION
SUPPORT AND
DEVELOPMENT
INTERFACE
PARAMETER
CONTROL
CHANNEL
SYSTEM
TEST
HOST
RAM
DATA
Freescale Semiconductor, Inc.
For More Information On This Product,
Figure 17-1 TPU3 Block Diagram
TIME PROCESSOR UNIT 3
CONTROL
DATA
TIME PROCESSOR UNIT 3
Go to: www.freescale.com
Rev. 15 October 2000
SECTION 17
MICROENGINE
SCHEDULER
EXECUTION
CONTROL
STORE
UNIT
T2CLK
PIN
CONTROL AND DATA
SERVICE REQUESTS
TCR1
TCR2
Figure 17-1
CHANNELS
CHANNEL 15
CHANNEL 0
CHANNEL 1
TIMER
is a simplified
MOTOROLA
PINS
17-1