MPC555LFMZP40 Freescale Semiconductor, MPC555LFMZP40 Datasheet - Page 778

IC MCU 32BIT 40MHZ 272-BGA

MPC555LFMZP40

Manufacturer Part Number
MPC555LFMZP40
Description
IC MCU 32BIT 40MHZ 272-BGA
Manufacturer
Freescale Semiconductor
Series
MPC5xxr
Datasheets

Specifications of MPC555LFMZP40

Core Processor
PowerPC
Core Size
32-Bit
Speed
40MHz
Connectivity
CAN, EBI/EMI, SCI, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
101
Program Memory Size
448KB (448K x 8)
Program Memory Type
FLASH
Ram Size
26K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 2.7 V
Data Converters
A/D 32x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
272-PBGA
Controller Family/series
POWER 5xx
Ram Memory Size
26KB
Cpu Speed
63MIPS
Embedded Interface Type
QSPI, SCI, TouCAN
Operating Temperature Range
-40°C To +125°C
No. Of Pins
272
Rohs Compliant
No
Processor Series
MPC5xx
Core
PowerPC
Data Bus Width
32 bit
Data Ram Size
26 KB
Interface Type
CAN, QSPI, SCI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
101
Operating Supply Voltage
3.3 V to 5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Development Tools By Supplier
MPC555CMEE
Minimum Operating Temperature
- 85 C
On-chip Adc
10 bit, 32 Channel
Cpu Family
MPC55xx
Device Core
PowerPC
Device Core Size
32b
Frequency (max)
40MHz
Total Internal Ram Size
32KB
# I/os (max)
101
Operating Supply Voltage (typ)
5V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
272
Package Type
BGA
For Use With
MPC555CMEE - KIT EVAL FOR MPC555
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Lead Free Status / Rohs Status
No

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MPC555LFMZP40
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MPC555 / MPC556
USER’S MANUAL
MSR
SPR 1
SPR 8
SPR 9
SPR 18
SPR 19
SPR 22
SPR 26
SPR 27
SPR 80
SPR 81
SPR 82
SPR 144
SPR 145
SPR 146
SPR 147
SPR 148
SPR 149
SPR 150
Address
Access
U
U
U
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
Table A-1 SPR (Special Purpose Registers)
MSR
XER
LR
CTR
DSISR
DAR
DEC
SRR0
SRR1
EIE
EID
NRI
CMPA
CMPB
CMPC
CMPD
ECR
DER
COUNTA
Freescale Semiconductor, Inc.
MPC555 / MPC556 INTERNAL MEMORY MAP
For More Information On This Product,
Symbol
Go to: www.freescale.com
Rev. 15 October 2000
Machine State Register.
See
Integer Exception Register.
See
Link Register.
See
tions.
Count Register.
See
scriptions.
DAE/Source Instruction Service Register.
See
Register (DSISR)
Data Address Register.
See
bit descriptions.
Decrementer Register.
See
bit descriptions.
Machine Status Save/Restore Register 0.
See
Register 0 (SRR0)
Machine Status Save/Restore Register 1.
See
Register 1 (SRR1)
External Interrupt Enable Register
See
pose Registers
External Interrupt Disable Register
See
pose Registers
Non-Recoverable Interrupt Register
See
pose Registers
Comparator A Value Register.
See
Comparator B Value Register.
See
Comparator C Value Register.
See
Comparator D Value Register.
See
Exception Cause Register
See
Debug Enable Register
See
Breakpoint Counter A Value and Control Reg-
ister
See
Table 3-12
Table 3-10
3.7.6 Link Register (LR)
3.7.7 Count Register (CTR)
3.9.2 DAE/Source Instruction Service
3.9.3 Data Address Register (DAR)
3.9.5 Decrementer Register (DEC)
3.9.6 Machine Status Save/Restore
3.9.7 Machine Status Save/Restore
3.9.10.1 EIE, EID, and NRI Special-Pur-
3.9.10.1 EIE, EID, and NRI Special-Pur-
3.9.10.1 EIE, EID, and NRI Special-Pur-
Table 21-17
Table 21-17
Table 21-17
Table 21-17
Table 21-27
Table 21-28
Table 21-25
for bit descriptions
for bit descriptions
for bit descriptions.
for bit descriptions.
for bit descriptions.
for bit descriptions.
for bit descriptions.
for bit descriptions.
for bit descriptions.
for bit descriptions.
for bit descriptions.
for bit descriptions.
Register
for bit descriptions.
for bit descriptions.
for bit descriptions.
for bit descrip-
for bit de-
for
for
Size
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
MOTOROLA
Reset
S
U
U
U
U
U
U
U
U
U
U
U
U
S
S
U
A-2

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