MPC555LFMZP40 Freescale Semiconductor, MPC555LFMZP40 Datasheet - Page 554

IC MCU 32BIT 40MHZ 272-BGA

MPC555LFMZP40

Manufacturer Part Number
MPC555LFMZP40
Description
IC MCU 32BIT 40MHZ 272-BGA
Manufacturer
Freescale Semiconductor
Series
MPC5xxr
Datasheets

Specifications of MPC555LFMZP40

Core Processor
PowerPC
Core Size
32-Bit
Speed
40MHz
Connectivity
CAN, EBI/EMI, SCI, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
101
Program Memory Size
448KB (448K x 8)
Program Memory Type
FLASH
Ram Size
26K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 2.7 V
Data Converters
A/D 32x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
272-PBGA
Controller Family/series
POWER 5xx
Ram Memory Size
26KB
Cpu Speed
63MIPS
Embedded Interface Type
QSPI, SCI, TouCAN
Operating Temperature Range
-40°C To +125°C
No. Of Pins
272
Rohs Compliant
No
Processor Series
MPC5xx
Core
PowerPC
Data Bus Width
32 bit
Data Ram Size
26 KB
Interface Type
CAN, QSPI, SCI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
101
Operating Supply Voltage
3.3 V to 5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Development Tools By Supplier
MPC555CMEE
Minimum Operating Temperature
- 85 C
On-chip Adc
10 bit, 32 Channel
Cpu Family
MPC55xx
Device Core
PowerPC
Device Core Size
32b
Frequency (max)
40MHz
Total Internal Ram Size
32KB
# I/os (max)
101
Operating Supply Voltage (typ)
5V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
272
Package Type
BGA
For Use With
MPC555CMEE - KIT EVAL FOR MPC555
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Lead Free Status / Rohs Status
No

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MPC555LFMZP40
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15.11 MIOS Double Action Submodule (MDASM)
MPC555
USER’S MANUAL
The MIOS double action submodule (MDASM) provides two consecutive 16-bit input
captures or two consecutive 16-bit output compare functions that can occur automat-
ically without software intervention. The input edge detector is programmable to trigger
the capture function to occur on the desired edge. The output flip-flop is set by one of
the output compares and is reset by the other one. In all modes except disable mode,
an optional interrupt is available to the software. Software selection is provided to se-
lect which of the incoming 16-bit counter buses is used for the input capture or the out-
put compare.
The MDASM has six different software selectable modes:
The MDASM has three data registers that are accessible to the software from the var-
ious modes. For some of the modes, two of the registers are cascaded together to pro-
vide double buffering. The value in one register is transferred to the other register
automatically at the correct time so that the minimum pulse (measurement or genera-
tion) is just one 16-bit counter bus count.
Refer to
• Disable mode
• Pulse width measurement
• Period measurement
• Input capture mode
• Single pulse generation
• Continuous pulse generation
/
MPC556
Table 15-36
MODULAR INPUT/OUTPUT SUBSYSTEM (MIOS1)
Freescale Semiconductor, Inc.
for the MDASM relative I/O pin implementation.
For More Information On This Product,
Table 15-15 MMCSMCR CP and
Prescaler Value
MPWMSMSCR CP Values
(CP in hex)
Go to: www.freescale.com
......
FD
FC
FF
FE
FB
FA
F9
F8
02
01
00
Rev. 15 October 2000
MIOS Prescaler Clock
254 (2^8 -2)
255 (2^8 -1)
Divided by
256 (2^8)
........
1
2
3
4
5
6
7
8
MOTOROLA
15-18

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