MPC555LFMZP40 Freescale Semiconductor, MPC555LFMZP40 Datasheet - Page 791

• Manufacturer Part Number: MPC555LFMZP40
• Description: IC MCU 32BIT 40MHZ 272-BGA
• Manufacturer: Freescale Semiconductor
• Series: MPC5xxr

Specifications of MPC555LFMZP40

• Core Processor: PowerPC
• Core Size: 32-Bit
• Speed: 40MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 101
• Program Memory Size: 448KB (448K x 8)
• Program Memory Type: FLASH
• Ram Size: 26K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 2.7 V
• Data Converters: A/D 32x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 272-PBGA
• Controller Family/series: POWER 5xx
• Ram Memory Size: 26KB
• Cpu Speed: 63MIPS
• Embedded Interface Type: QSPI, SCI, TouCAN
• Operating Temperature Range: -40°C To +125°C
• No. Of Pins: 272
• Rohs Compliant: No
• Processor Series: MPC5xx
• Core: PowerPC
• Data Bus Width: 32 bit
• Data Ram Size: 26 KB
• Interface Type: CAN, QSPI, SCI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 101
• Operating Supply Voltage: 3.3 V to 5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: MPC555CMEE
• Minimum Operating Temperature: - 85 C
• On-chip Adc: 10 bit, 32 Channel
• Cpu Family: MPC55xx
• Device Core: PowerPC
• Device Core Size: 32b
• Frequency (max): 40MHz
• Total Internal Ram Size: 32KB
• # I/os (max): 101
• Operating Supply Voltage (typ): 5V
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 272
• Package Type: BGA
• For Use With: MPC555CMEE - KIT EVAL FOR MPC555
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No

MPC555 / MPC556
USER’S MANUAL
0x30 5000
0x30 5002
0x30 5004
0x30 5006
0x30 5008
0x30 500A
0x30 500C
0x30 500E
0x30 5010 —
0x30 5012
0x30 5014
0x30 5016
0x30 5018
0x30 501A
0x30 501C
0x30 501E
0x30 501F
0x30 5020
0x30 5022
0x30 5024
0x30 5026
0x30 5028
0x30 502A
0x30 502C –
0x30 504A
0x30 504C –
0x30 506A
0x30 506C –
0x30 5013F
Address
Table A-9 QSMCM (Queued Serial Multi-Channel Module)
Access
S/U
S/U
S/U
S/U
S/U
S/U
S/U
S/U
S/U
S/U
S/U
S/U
S/U
S/U
S/U
S/U
S/U
S/U
S/U
—
—
S
T
S
S
1
2
QSMCMMCR
QTEST
QDSCI_IL
QSPI_IL
SCC1R0
SCC1R1
SC1SR
SC1DR
PORTQS
PQSPAR/
DDRQST
SPCR0
SPCR1
SPCR2
SPCR3
SPSR
SCC2R0
SCC2R1
SC2SR
SC2DR
QSCI1CR
QSCI1SR
SCTQ
SCRQ
Freescale Semiconductor, Inc.
MPC555 / MPC556 INTERNAL MEMORY MAP
For More Information On This Product,
Symbol
—
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Go to: www.freescale.com
Rev. 15 October 2000
QSMCM Module Configuration Register.
See
QSMCM Test Register
Dual SCI Interrupt Level.
See
Queued SPI Interrupt Level.
See
SCI1Control Register 0.
See
SCI1Control Register 1.
See
SCI1 Status Register.
See
SCI1 Data Register.
See
Reserved
QSMCM Port QS Data Register.
See
(PORTQS)
QSMCM Port QS PIn Assignment Register/
QSMCM Port QS Data Direction Register.
See
QSPI Control Register 0.
See
QSPI Control Register 1.
See
QSPI Control Register 2.
See
QSPI Control Register 3.
See
QSPI Status Register 3.
See
SCI2 Control Register 0
SCI2 Control Register 1
SCI2 Status Register
SCI2 Data Register
QSCI1 Control Register.
See
QSCI1 Status Register.
See
Transmit Queue Locations
Receive Queue Locations
Reserved
Table 14-4
Table 14-5
Table 14-6
Table 14-23
Table 14-24
Table 14-25
Table 14-26
14.6.1 Port QS Data Register
Table 14-11
Table 14-13
Table 14-15
Table 14-16
Table 14-17
Table 14-18
Table 14-30
Table 14-31
for bit descriptions.
for bit descriptions.
for bit descriptions.
for bit descriptions.
for bit descriptions.
for bit descriptions.
for bit descriptions.
for bit descriptions.
for bit descriptions.
for bit descriptions.
for bit descriptions.
for bit descriptions.
for bit descriptions.
for bit descriptions.
for bit descriptions.
for bit descriptions.
Register
Size
16
16
16
16
16
16
16
16
—
16
16
16
16
16
16
16
16
16
16
16
16
16
—
8
8
MOTOROLA
Reset
—
—
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
A-15