MPC555LFMZP40 Freescale Semiconductor, MPC555LFMZP40 Datasheet - Page 241

IC MCU 32BIT 40MHZ 272-BGA

MPC555LFMZP40

Manufacturer Part Number
MPC555LFMZP40
Description
IC MCU 32BIT 40MHZ 272-BGA
Manufacturer
Freescale Semiconductor
Series
MPC5xxr
Datasheets

Specifications of MPC555LFMZP40

Core Processor
PowerPC
Core Size
32-Bit
Speed
40MHz
Connectivity
CAN, EBI/EMI, SCI, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
101
Program Memory Size
448KB (448K x 8)
Program Memory Type
FLASH
Ram Size
26K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 2.7 V
Data Converters
A/D 32x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
272-PBGA
Controller Family/series
POWER 5xx
Ram Memory Size
26KB
Cpu Speed
63MIPS
Embedded Interface Type
QSPI, SCI, TouCAN
Operating Temperature Range
-40°C To +125°C
No. Of Pins
272
Rohs Compliant
No
Processor Series
MPC5xx
Core
PowerPC
Data Bus Width
32 bit
Data Ram Size
26 KB
Interface Type
CAN, QSPI, SCI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
101
Operating Supply Voltage
3.3 V to 5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Development Tools By Supplier
MPC555CMEE
Minimum Operating Temperature
- 85 C
On-chip Adc
10 bit, 32 Channel
Cpu Family
MPC55xx
Device Core
PowerPC
Device Core Size
32b
Frequency (max)
40MHz
Total Internal Ram Size
32KB
# I/os (max)
101
Operating Supply Voltage (typ)
5V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
272
Package Type
BGA
For Use With
MPC555CMEE - KIT EVAL FOR MPC555
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Lead Free Status / Rohs Status
No

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6.13.4.6 Real-Time Clock Register (RTC)
RTC —Real-Time Clock Register
6.13.4.7 Real-Time Clock Alarm Register (RTCAL)
RTCAL — Real-Time Clock Alarm Register
MPC555
USER’S MANUAL
Bit(s)
MSB
MSB
0:7
10
11
12
13
14
15
0
0
8
9
The real-time clock register is a 32-bit read write register. It contains the current value
of the real-time clock. A write to the RTC resets the seconds timer to zero. This register
is locked after RESET. Unlocking is accomplished by writing 0x55CCAA33 to its as-
sociated key register. See
The RTCAL is a 32-bit read/write register. When the value of the RTC is equal to the
value programmed in the alarm register, a maskable interrupt is generated.
The alarm interrupt will be generated as soon as there is a match between the ALARM
field and the corresponding bits in the RTC. The resolution of the alarm is 1 sec. This
register is locked after RESET. Unlocking is accomplished by writing 0x55CCAA33 to
its associated key register. See
nism.
/
RTCIRQ
MPC556
Name
SEC
ALR
RTF
RTE
ALE
SIE
4M
Real-time clock interrupt request. Thee bits determine the interrupt priority level of the RTC. Re-
fer to
Once per second interrupt. This status bit is set every second. It should be cleared by the soft-
ware.
Alarm interrupt. This status bit is set when the value of the RTC equals the value programmed in
the alarm register.
Reserved
Real-time clock source
0 = RTC assumes that it is driven by 20 MHz to generate the seconds pulse.
1 = RTC assumes that it is driven by 4 MHz
Second interrupt enable. If this bit is set, the RTC generates an interrupt when the SEC bit is set.
Alarm interrupt enable. If this bit is set, the RTC generates an interrupt when the ALR bit is set.
Real-time clock freeze. If this bit is set, the RTC stops while FREEZE is asserted.
Real-time clock enable
0 = RTC is disabled
1 = RTC is enabled
6.4 Interrupt Controller
Freescale Semiconductor, Inc.
SYSTEM CONFIGURATION AND PROTECTION
Table 6-17 RTCSC Bit Descriptions
For More Information On This Product,
8.9.3.2 Keep Alive Power Registers Lock
Go to: www.freescale.com
Rev. 15 October 2000
8.9.3.2 Keep Alive Power Registers Lock Mecha-
RESET: UNCHANGED
RESET: UNCHANGED
for interrupt level encodings.
ALARM
RTC
Description
Mechanism.
0x2F C22C
0x2F C224
MOTOROLA
LSB
LSB
6-33
31
31

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