MPC555LFMZP40 Freescale Semiconductor, MPC555LFMZP40 Datasheet - Page 612

• Manufacturer Part Number: MPC555LFMZP40
• Description: IC MCU 32BIT 40MHZ 272-BGA
• Manufacturer: Freescale Semiconductor
• Series: MPC5xxr

Specifications of MPC555LFMZP40

• Core Processor: PowerPC
• Core Size: 32-Bit
• Speed: 40MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 101
• Program Memory Size: 448KB (448K x 8)
• Program Memory Type: FLASH
• Ram Size: 26K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 2.7 V
• Data Converters: A/D 32x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 272-PBGA
• Controller Family/series: POWER 5xx
• Ram Memory Size: 26KB
• Cpu Speed: 63MIPS
• Embedded Interface Type: QSPI, SCI, TouCAN
• Operating Temperature Range: -40°C To +125°C
• No. Of Pins: 272
• Rohs Compliant: No
• Processor Series: MPC5xx
• Core: PowerPC
• Data Bus Width: 32 bit
• Data Ram Size: 26 KB
• Interface Type: CAN, QSPI, SCI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 101
• Operating Supply Voltage: 3.3 V to 5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: MPC555CMEE
• Minimum Operating Temperature: - 85 C
• On-chip Adc: 10 bit, 32 Channel
• Cpu Family: MPC55xx
• Device Core: PowerPC
• Device Core Size: 32b
• Frequency (max): 40MHz
• Total Internal Ram Size: 32KB
• # I/os (max): 101
• Operating Supply Voltage (typ): 5V
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 272
• Package Type: BGA
• For Use With: MPC555CMEE - KIT EVAL FOR MPC555
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No

CANCTRL2 — Control Register 2
16.7.7 Control Register 2
MPC555
USER’S MANUAL
MSB
Bit(s)
Bit(s)
10:12
13:15
0
0
8:15
RESET:
0:7
0:7
8:9
1
0
/
CANCTRL2
MPC556
PRESDIV
PRESDIV
PSEG1
PSEG2
Name
Name
RJW
2
0
PRESDIV
3
0
Prescaler divide factor. PRESDIV determines the ratio between the IMB clock frequency and
the serial clock (S-clock). The S-clock is determined by the following calculation:
The reset value of PRESDIV is 0x00, which forces the S-clock to default to the same fre-
quency as the IMB clock. The valid programmed values are 0 through 255.
See
Resynchronization jump width. The RJW field defines the maximum number of time quanta
a bit time may be changed during resynchronization. The valid programmed values are zero
through three.
The resynchronization jump width is calculated as follows:
Resynchronizaton Jump Width = (RJW + 1) Time Quanta
PSEG1[2:0] — Phase buffer segment 1. The PSEG1 field defines the length of phase buffer
segment one in the bit time. The valid programmed values are zero through seven.
The length of phase buffer segment 1 is calculated as follows:
Phase Buffer Segment 1 = (PSEG1 + 1) Time Quanta
PSEG2 — Phase Buffer Segment 2. The PSEG2 field defines the length of phase buffer seg-
ment two in the bit time. The valid programmed values are zero through seven.
The length of phase buffer segment two is calculated as follows:
Phase Buffer Segment 2 = (PSEG2 + 1) Time Quanta
See
Table 16-18 CANCTRL2 Bit Descriptions
Table
Table
Freescale Semiconductor, Inc.
Table 16-17 PRESDIV Bit Descriptions
4
0
For More Information On This Product,
16-18.
16-17.
CAN 2.0B CONTROLLER MODULE
5
0
Go to: www.freescale.com
Rev. 15 October 2000
6
0
7
0
8
0
RJW
S-clock
Description
Description
9
0
=
----------------------------------- -
PRESDIV
10
0
f
SYS
PSEG
11
0
+
1
12
0
13
0
0x30 7088
0x30 7488
MOTOROLA
PSEG2
14
0
16-30
LSB
15
0