MPC555LFMZP40 Freescale Semiconductor, MPC555LFMZP40 Datasheet - Page 547

• Manufacturer Part Number: MPC555LFMZP40
• Description: IC MCU 32BIT 40MHZ 272-BGA
• Manufacturer: Freescale Semiconductor
• Series: MPC5xxr

Specifications of MPC555LFMZP40

• Core Processor: PowerPC
• Core Size: 32-Bit
• Speed: 40MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 101
• Program Memory Size: 448KB (448K x 8)
• Program Memory Type: FLASH
• Ram Size: 26K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 2.7 V
• Data Converters: A/D 32x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 272-PBGA
• Controller Family/series: POWER 5xx
• Ram Memory Size: 26KB
• Cpu Speed: 63MIPS
• Embedded Interface Type: QSPI, SCI, TouCAN
• Operating Temperature Range: -40°C To +125°C
• No. Of Pins: 272
• Rohs Compliant: No
• Processor Series: MPC5xx
• Core: PowerPC
• Data Bus Width: 32 bit
• Data Ram Size: 26 KB
• Interface Type: CAN, QSPI, SCI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 101
• Operating Supply Voltage: 3.3 V to 5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: MPC555CMEE
• Minimum Operating Temperature: - 85 C
• On-chip Adc: 10 bit, 32 Channel
• Cpu Family: MPC55xx
• Device Core: PowerPC
• Device Core Size: 32b
• Frequency (max): 40MHz
• Total Internal Ram Size: 32KB
• # I/os (max): 101
• Operating Supply Voltage (typ): 5V
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 272
• Package Type: BGA
• For Use With: MPC555CMEE - KIT EVAL FOR MPC555
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No

MIOS1LVL0 — MIOS1 Interrupt Level Register 0
15.8.2.2 MIOS1 Interrupt Level Register 1 (MIOS1LVL1)
MIOS1LVL1 — MIOS1 Interrupt Level 1 Register
15.8.3 Interrupt Control Section (ICS)
MPC555
USER’S MANUAL
MSB
MSB
Bit(s)
10:15
Bit(s)
10:15
0:4
5:7
8:9
0:4
5:7
8:9
0
0
0
0
RESET:
RESET:
This register contains the interrupt level that applies to the submodules number 31 to
16.
The interrupt control section delivers the interrupt level to the CPU. The interrupt con-
trol section adapts the characteristics of the MIOB request bus to the characteristics
of the interrupt structure of the IMB3.
When at least one of the flags is set on an enabled level, the ICS receives a signal
from the corresponding IRQ pending register. This signal is the result of a logical “OR”
between all the bits of the IRQ pending register.
The signal received from the IRQ pending register is associated with the interrupt level
register within the ICS. This level is coded on five bits in this register: three bits repre-
sent one of eight levels and the two other represent the four time multiplex slots. Ac-
1
0
—
LVL
TM
—
1
0
/
MPC556
RESERVED
RESERVED
Name
Name
LVL
TM
—
—
2
0
2
0
Reserved
Interrupt request level. This field represents one of eight possible levels.
Time multiplexing. This field determines the multiplexed time slot
Reserved
Reserved
Interrupt request level. This field represents one of eight possible levels.
Time multiplexing. This field determines the multiplexed time slot.
Reserved
3
0
3
0
MODULAR INPUT/OUTPUT SUBSYSTEM (MIOS1)
Table 15-7 MIOS1LVL0 Bit Descriptions
Table 15-8 MIOS1LVL1 Bit Descriptions
Freescale Semiconductor, Inc.
4
0
4
0
For More Information On This Product,
5
0
5
0
Go to: www.freescale.com
LVL
LVL
Rev. 15 October 2000
6
0
6
0
7
0
7
0
8
0
8
0
Description
Description
TM
TM
9
0
9
0
10
10
0
0
11
11
0
0
RESERVED
RESERVED
12
12
0
0
13
13
0
0
0x30 6C30
0x30 6C70
MOTOROLA
14
14
0
0
15-11
LSB
LSB
15
15
0
0