MPC555LFMZP40 Freescale Semiconductor, MPC555LFMZP40 Datasheet - Page 511

• Manufacturer Part Number: MPC555LFMZP40
• Description: IC MCU 32BIT 40MHZ 272-BGA
• Manufacturer: Freescale Semiconductor
• Series: MPC5xxr

Specifications of MPC555LFMZP40

• Core Processor: PowerPC
• Core Size: 32-Bit
• Speed: 40MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 101
• Program Memory Size: 448KB (448K x 8)
• Program Memory Type: FLASH
• Ram Size: 26K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 2.7 V
• Data Converters: A/D 32x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 272-PBGA
• Controller Family/series: POWER 5xx
• Ram Memory Size: 26KB
• Cpu Speed: 63MIPS
• Embedded Interface Type: QSPI, SCI, TouCAN
• Operating Temperature Range: -40°C To +125°C
• No. Of Pins: 272
• Rohs Compliant: No
• Processor Series: MPC5xx
• Core: PowerPC
• Data Bus Width: 32 bit
• Data Ram Size: 26 KB
• Interface Type: CAN, QSPI, SCI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 101
• Operating Supply Voltage: 3.3 V to 5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: MPC555CMEE
• Minimum Operating Temperature: - 85 C
• On-chip Adc: 10 bit, 32 Channel
• Cpu Family: MPC55xx
• Device Core: PowerPC
• Device Core Size: 32b
• Frequency (max): 40MHz
• Total Internal Ram Size: 32KB
• # I/os (max): 101
• Operating Supply Voltage (typ): 5V
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 272
• Package Type: BGA
• For Use With: MPC555CMEE - KIT EVAL FOR MPC555
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No

14.8.5 SCI Data Register (SCxDR)
SCxDR — SCI Data Register
MPC555
USER’S MANUAL
RESET:
Bit(s)
MSB
13
14
15
0
0
The SCxDR consists of two data registers located at the same address. The receive
data register (RDRx) is a read-only register that contains data received by the SCI se-
rial interface. Data is shifted into the receive serial shifter and is transferred to RDRx.
The transmit data register (TDRx) is a write-only register that contains data to be trans-
mitted. Data is first written to TDRx, then transferred to the transmit serial shifter,
where additional format bits are added before transmission.
/
1
0
MPC556
Name
NF
FE
PF
2
0
RESERVED
Noise error flag. NF is set when the receiver detects noise on a valid start bit, on any of the data
bits, or on the stop bit(s). It is not set by noise on the idle line or on invalid start bits. Each bit is
sampled three times for noise. If the three samples are not at the same logic level, the majority
value is used for the received data value, and NF is set. NF is not set until the entire frame is
received and RDRF is set.
Although no interrupt is explicitly associated with NF, an interrupt can be generated with RDRF,
and the interrupt handler can check NF.
0 = No noise detected in the received data.
1 = Noise detected in the received data.
For receiver queue operation NF is cleared when SCxSR is read with NF set, followed by a read
Framing error. FE is set when the receiver detects a zero where a stop bit (one) was expected.
A framing error results when the frame boundaries in the received bit stream are not synchro-
nized with the receiver bit counter. FE is not set until the entire frame is received and RDRF is set.
Although no interrupt is explicitly associated with FE, an interrupt can be generated with RDRF,
and the interrupt handler can check FE.
0 = No framing error detected in the received data.
1 = Framing error or break detected in the received data.
Parity error. PF is set when the receiver detects a parity error. PF is not set until the entire frame
is received and RDRF is set.
Although no interrupt is explicitly associated with PF, an interrupt can be generated with RDRF,
and the interrupt handler can check PF.
0 = No parity error detected in the received data.
1 = Parity error detected in the received data.
Table 14-25 SCxSR Bit Descriptions (Continued)
3
0
of SCRQ[0:15].
Freescale Semiconductor, Inc.
QUEUED SERIAL MULTI-CHANNEL MODULE
For More Information On This Product,
4
0
5
0
Go to: www.freescale.com
Rev. 15 October 2000
6
0
R8/T8 R7/T7 R6/T6 R5/T5 R4/T4 R3/T3 R2/T2 R1/T1 R0/T0
U
7
U
8
Description
U
9
10
U
11
U
0x30 500E, 0x30 5026
12
U
13
U
MOTOROLA
14
U
14-49
LSB
15
U