MPC555LFMZP40 Freescale Semiconductor, MPC555LFMZP40 Datasheet - Page 681

• Manufacturer Part Number: MPC555LFMZP40
• Description: IC MCU 32BIT 40MHZ 272-BGA
• Manufacturer: Freescale Semiconductor
• Series: MPC5xxr

Specifications of MPC555LFMZP40

• Core Processor: PowerPC
• Core Size: 32-Bit
• Speed: 40MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 101
• Program Memory Size: 448KB (448K x 8)
• Program Memory Type: FLASH
• Ram Size: 26K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 2.7 V
• Data Converters: A/D 32x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 272-PBGA
• Controller Family/series: POWER 5xx
• Ram Memory Size: 26KB
• Cpu Speed: 63MIPS
• Embedded Interface Type: QSPI, SCI, TouCAN
• Operating Temperature Range: -40°C To +125°C
• No. Of Pins: 272
• Rohs Compliant: No
• Processor Series: MPC5xx
• Core: PowerPC
• Data Bus Width: 32 bit
• Data Ram Size: 26 KB
• Interface Type: CAN, QSPI, SCI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 101
• Operating Supply Voltage: 3.3 V to 5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: MPC555CMEE
• Minimum Operating Temperature: - 85 C
• On-chip Adc: 10 bit, 32 Channel
• Cpu Family: MPC55xx
• Device Core: PowerPC
• Device Core Size: 32b
• Frequency (max): 40MHz
• Total Internal Ram Size: 32KB
• # I/os (max): 101
• Operating Supply Voltage (typ): 5V
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 272
• Package Type: BGA
• For Use With: MPC555CMEE - KIT EVAL FOR MPC555
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No

19.7.4 Exponential Clock Multiplier
19.7.5 Linear Clock Multiplier
19.7.6 A Technique to Determine SCLKR, CLKPE, and CLKPM
MPC555
USER’S MANUAL
CSC
PE |
NOTES:
0
1
1. CMF clock frequency after SCKLR scaling. Example: A 40 MHz system clock scaled by 4 (SCLKR[0:2] = 0b101)
The second term in the pulse width timing equation is the exponential clock multiplier,
N. The program pulse number (pulse), clock period exponent (CLKPE), CSC, and PE
define the exponent in the 2
by the equation:
All of the exponents are shown in
The third term of the pulse width timing equation is the linear clock multiplier, M. The
clock period multiplier, CLKPM[0:6], defines a linear multiplier for the program or erase
pulse. The multiplier, M, is defined by the equation:
This allows for the program/erase pulse to be from one to 128 times the pulse set by
the system clock period, SCLKR[0:2] and CLKPE[0:1].
The default reset state of CLKPM[0:6] = 000 0000 for a multiplier of one.
The following example determines the values of the SCLKR, CLKPE, and CLKPM
fields for a 25.6 µs program pulse, PE = 0, in a system with a 40 MHz system clock.
results in an equivalent CMF clock of 10 MHz.
CLKPE[0:1]
/
00
01
10
11
00
01
10
11
MPC556
Table 19-13 Clock Period Exponent and Pulse Width Range
Exponent
(N)
15
16
17
18
5
6
7
8
Freescale Semiconductor, Inc.
For More Information On This Product,
2
16.384 ms
32.768 ms
4.096 ms
8.192 ms
N
8 MHz
N = 5 + CLKPE[0:1] + ((PE | CSC)
•1.25E-7
16 µs
32 µs
4 µs
8 µs
N
CDR MoneT FLASH EEPROM
Minimum Pulse Width
1
Go to: www.freescale.com
multiply of the clock period. The exponent, N, is defined
Rev. 15 October 2000
3.2 µs
6.4 µs
12.8 µs
25.6 µs
3.28 ms
6.55 ms
13.11 ms
26.21 ms
M = 1 + CLKPM[0:6]
Table
10 MHz
2
N
•1E-7
Pulse Width Range for all System Clock
Frequencies from 8.0 MHz to 40.0 MHz.
1
19-12.
2.7 µs
5.3 µs
10.7 µs
21.3 µs
2.73 ms
5.46 ms
10.92 ms
21.85 ms
2
N
12 MHz
•0.833E-7
1
512 µs
1.024 ms
2.048 ms
4.096 ms
524.29 ms
1.05 s
2.10 s
2
4.19 s
N
8 MHz
•1.25E-07
•
Maximum Pulse Width
10)
1
409.6 µs
819.2 µs
1.6384 ms
3.2768 ms
419.43 ms
838.86 ms
1.68 s
3.35 s
10 MHz
2
N
•1E-7
1
MOTOROLA
341.3 µs
682.7 µs
1.365 ms
2.731 ms
349.5 ms
699.1 ms
1.398 s
2.796 s
2
N
12 MHz
•0.833E-7
19-29
1