MPC555LFMZP40 Freescale Semiconductor, MPC555LFMZP40 Datasheet - Page 223

• Manufacturer Part Number: MPC555LFMZP40
• Description: IC MCU 32BIT 40MHZ 272-BGA
• Manufacturer: Freescale Semiconductor
• Series: MPC5xxr

Specifications of MPC555LFMZP40

• Core Processor: PowerPC
• Core Size: 32-Bit
• Speed: 40MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 101
• Program Memory Size: 448KB (448K x 8)
• Program Memory Type: FLASH
• Ram Size: 26K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 2.7 V
• Data Converters: A/D 32x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 272-PBGA
• Controller Family/series: POWER 5xx
• Ram Memory Size: 26KB
• Cpu Speed: 63MIPS
• Embedded Interface Type: QSPI, SCI, TouCAN
• Operating Temperature Range: -40°C To +125°C
• No. Of Pins: 272
• Rohs Compliant: No
• Processor Series: MPC5xx
• Core: PowerPC
• Data Bus Width: 32 bit
• Data Ram Size: 26 KB
• Interface Type: CAN, QSPI, SCI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 101
• Operating Supply Voltage: 3.3 V to 5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: MPC555CMEE
• Minimum Operating Temperature: - 85 C
• On-chip Adc: 10 bit, 32 Channel
• Cpu Family: MPC55xx
• Device Core: PowerPC
• Device Core Size: 32b
• Frequency (max): 40MHz
• Total Internal Ram Size: 32KB
• # I/os (max): 101
• Operating Supply Voltage (typ): 5V
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 272
• Package Type: BGA
• For Use With: MPC555CMEE - KIT EVAL FOR MPC555
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No

6.9 Periodic Interrupt Timer (PIT)
MPC555
USER’S MANUAL
pitrtclk
The periodic interrupt timer consists of a 16-bit counter clocked by the PITRCLK clock
supplied by the clock module.
The 16-bit counter counts down to zero when loaded with a value from the PITC. After
the timer reaches zero, the PS bit is set and an interrupt is generated if the PIE bit is
is a logic one. The software service routine should read the PS bit and then write it to
zero to terminate the interrupt request. At the next input clock edge, the value in the
PITC is loaded into the counter, and the process starts over again.
When a new value is loaded into the PITC, the periodic timer is updated, the divider is
reset, and the counter begins counting. If the PS bit is not cleared, an interrupt request
is generated. The request remains pending until PS is cleared. If the PS bit is set again
prior to being cleared, the interrupt remains pending until PS is cleared.
Any write to the PITC stops the current countdown, and the count resumes with the
new value in PITC. If the PTE bit is not set, the PIT is unable to count and retains the
old count value. Reads of the PIT have no effect on the counter value.
Clock
/
MPC556
Disable
FREEZE
Clock
Freescale Semiconductor, Inc.
SYSTEM CONFIGURATION AND PROTECTION
For More Information On This Product,
Figure 6-6 RTC Block Diagram
By 15625
By 78125
Go to: www.freescale.com
RTSEC
Divide
Divide
Rev. 15 October 2000
4-MHz / 20-MHz crystal
MUX
32-bit Register (RTCAL)
32-bit Counter (RTC)
=
MOTOROLA
Interrupt
Interrupt
Alarm
Sec
6-15